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Searched refs:msi (Results 1 – 25 of 183) sorted by relevance

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/f-stack/freebsd/x86/x86/
H A Dmsi.c209 apic_enable_vector(msi->msi_cpu, msi->msi_vector); in msi_enable_intr()
217 apic_disable_vector(msi->msi_cpu, msi->msi_vector); in msi_disable_intr()
255 if (msi->msi_first != msi) in msi_assign_cpu()
273 msi->msi_count, msi->msi_maxcount); in msi_assign_cpu()
282 apic_enable_vector(msi->msi_cpu, msi->msi_vector); in msi_assign_cpu()
286 msi->msi_cpu, msi->msi_vector); in msi_assign_cpu()
481 msi->msi_irq, msi->msi_cpu, msi->msi_vector); in msi_alloc()
540 apic_free_vector(msi->msi_cpu, msi->msi_vector, msi->msi_irq); in msi_release()
596 msi = msi->msi_first; in msi_map()
708 msi->msi_first = msi; in msix_alloc()
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/f-stack/freebsd/contrib/device-tree/Bindings/pci/
H A Dpci-msi.txt34 (rid-base,msi-controller,msi-base,length), where:
40 * msi-base is an msi-specifier describing the msi-specifier produced for the
47 the listed msi-controller, with the msi-specifier (r - rid-base + msi-base).
50 to an msi-specifier per the msi-map property.
66 msi: msi-controller@a {
69 msi-controller;
94 msi: msi-controller@a {
123 msi: msi-controller@a {
140 msi-map = <0x0000 &msi 0x0000 0x8000>,
153 msi: msi-controller@a {
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H A Dxgene-pci-msi.txt5 - compatible: should be "apm,xgene1-msi" to identify
7 - msi-controller: indicates that this is an X-Gene v1 PCIe MSI controller node
16 Each PCIe node needs to have property msi-parent that points to an MSI
24 msi@79000000 {
25 compatible = "apm,xgene1-msi";
26 msi-controller;
46 + PCIe controller node with msi-parent property pointing to MSI node:
67 msi-parent= <&msi>;
H A Daltera-pcie-msi.txt4 - compatible: should contain "altr,msi-1.0"
14 - msi-controller: indicates that this is MSI controller node
18 msi0: msi@0xFF200000 {
19 compatible = "altr,msi-1.0";
25 msi-controller;
H A Dbrcm,stb-pcie.yaml34 - const: msi
49 msi-controller:
52 msi-parent:
69 - msi-controller
90 interrupt-names = "pcie", "msi";
93 msi-parent = <&pcie0>;
94 msi-controller;
H A Dbrcm,iproc-pcie.txt52 - msi-map: Maps a Requester ID to an MSI controller and associated MSI
55 - msi-parent: Link to the device node of the MSI controller, used when no MSI
60 the use of 'msi-map' and 'msi-parent':
61 Documentation/devicetree/bindings/pci/pci-msi.txt
62 Documentation/devicetree/bindings/interrupt-controller/msi.txt
66 - compatible: Must be "brcm,iproc-msi"
67 - msi-controller: claims itself as an MSI controller
99 msi-parent = <&msi0>;
102 msi0: msi@18012000 {
103 compatible = "brcm,iproc-msi";
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/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dloongson,pch-msi.yaml19 const: loongson,pch-msi-1.0
24 loongson,msi-base-vec:
32 loongson,msi-num-vecs:
40 msi-controller: true
45 - msi-controller
46 - loongson,msi-base-vec
47 - loongson,msi-num-vecs
52 msi: msi-controller@2ff00000 {
55 msi-controller;
56 loongson,msi-base-vec = <64>;
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H A Dfsl,ls-scfg-msi.txt5 - compatible: should be "fsl,<soc-name>-msi" to identify
7 "fsl,ls1021a-msi"
8 "fsl,ls1043a-msi"
9 "fsl,ls1046a-msi"
10 "fsl,ls1043a-v1.1-msi"
11 "fsl,ls1012a-msi"
12 - msi-controller: indicates that this is a PCIe MSI controller node
20 Each PCIe node needs to have property msi-parent that points to
25 msi1: msi-controller@1571000 {
26 compatible = "fsl,ls1043a-msi";
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H A Dmsi.txt45 - #msi-cells: The number of cells in an msi-specifier, required if not zero.
64 - msi-parent: A list of phandle + msi-specifier pairs, one for each MSI
73 When #msi-cells is non-zero, busses with an msi-parent will require
85 msi_a: msi-controller@a {
88 msi-controller;
92 msi_b: msi-controller@b {
95 msi-controller;
97 #msi-cells = <1>;
103 msi-controller;
105 #msi-cells = <1>;
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H A Dal,alpine-msix.txt10 - msi-controller: identifies the node as an PCI Message Signaled Interrupt
12 - al,msi-base-spi: SPI base of the MSI frame
13 - al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
22 msi-controller;
23 al,msi-base-spi = <160>;
24 al,msi-num-spis = <160>;
H A Darm,gic-v3.yaml105 msi-controller:
172 "#msi-cells":
194 - msi-controller
195 - "#msi-cells"
218 msi-controller;
223 msi-controller;
224 #msi-cells = <1>;
248 msi-controller;
249 #msi-cells = <1>;
255 msi-controller;
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H A Dhisilicon,mbigen-v2.txt6 MBI is kind of msi interrupt only used on Non-PCI devices.
28 - msi-parent: Specifies the MSI controller this mbigen use.
29 For more detail information,please refer to the generic msi-parent binding in
30 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
56 msi-parent = <&its_dsa 0x40b1c>;
63 msi-parent = <&its_dsa 0x40b0e>;
/f-stack/freebsd/x86/xen/
H A Dxen_pci_bus.c52 struct pcicfg_msi *msi = &dinfo->cfg.msi; in xen_pci_enable_msi_method() local
55 msi->msi_ctrl |= PCIM_MSICTRL_MSI_ENABLE; in xen_pci_enable_msi_method()
56 pci_write_config(child, msi->msi_location + PCIR_MSI_CTRL, in xen_pci_enable_msi_method()
57 msi->msi_ctrl, 2); in xen_pci_enable_msi_method()
64 struct pcicfg_msi *msi = &dinfo->cfg.msi; in xen_pci_disable_msi_method() local
66 msi->msi_ctrl &= ~PCIM_MSICTRL_MSI_ENABLE; in xen_pci_disable_msi_method()
67 pci_write_config(child, msi->msi_location + PCIR_MSI_CTRL, in xen_pci_disable_msi_method()
68 msi->msi_ctrl, 2); in xen_pci_disable_msi_method()
/f-stack/freebsd/contrib/device-tree/src/mips/loongson/
H A Dloongson64c_4core_ls7a.dts28 msi: msi-controller@2ff00000 { label
29 compatible = "loongson,pch-msi-1.0";
32 msi-controller;
33 loongson,msi-base-vec = <64>;
34 loongson,msi-num-vecs = <64>;
H A Dloongson64g_4core_ls7a.dts32 msi: msi-controller@2ff00000 { label
33 compatible = "loongson,pch-msi-1.0";
36 msi-controller;
37 loongson,msi-base-vec = <64>;
38 loongson,msi-num-vecs = <192>;
/f-stack/freebsd/contrib/device-tree/Bindings/powerpc/fsl/
H A Dmsi-pic.txt5 The first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
6 etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" or
7 "fsl,mpic-msi-v4.3" depending on the parent type and version. If mpic
21 be set as edge sensitive. If msi-available-ranges is present, only
26 msi interrupt can be used in the 256 msi interrupts. This property is
43 msi@41600 {
44 compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
46 msi-available-ranges = <0 0x100>;
59 msi@41600 {
60 compatible = "fsl,mpic-msi-v4.3";
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/f-stack/freebsd/amd64/vmm/io/
H A Dppt.c99 } msi; member
248 if (ppt->msi.num_msgs == 0) in ppt_teardown_msi()
253 res = ppt->msi.res[i]; in ppt_teardown_msi()
262 ppt->msi.res[i] = NULL; in ppt_teardown_msi()
263 ppt->msi.cookie[i] = NULL; in ppt_teardown_msi()
266 if (ppt->msi.startrid == 1) in ppt_teardown_msi()
269 ppt->msi.num_msgs = 0; in ppt_teardown_msi()
491 if (ppt->msi.startrid == 0) in pptintr()
561 ppt->msi.num_msgs = i + 1; in ppt_setup_msi()
562 ppt->msi.cookie[i] = NULL; in ppt_setup_msi()
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/f-stack/freebsd/contrib/device-tree/src/arm64/marvell/
H A Darmada-ap80x.dtsi92 msi-controller;
95 arm,msi-num-spis = <32>;
99 msi-controller;
102 arm,msi-num-spis = <32>;
106 msi-controller;
109 arm,msi-num-spis = <32>;
113 msi-controller;
116 arm,msi-num-spis = <32>;
137 msi-controller;
150 msi-controller;
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H A Darmada-ap810-ap0.dtsi59 msi-controller;
60 #msi-cells = <1>;
77 msi-parent = <&gic_its_ap0 0xa0>;
85 msi-parent = <&gic_its_ap0 0xa1>;
93 msi-parent = <&gic_its_ap0 0xa2>;
101 msi-parent = <&gic_its_ap0 0xa3>;
/f-stack/freebsd/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-mpic.dtsi54 msi0: msi@41600 {
55 compatible = "fsl,mpic-msi";
57 msi-available-ranges = <0 0x100>;
69 msi1: msi@41800 {
70 compatible = "fsl,mpic-msi";
72 msi-available-ranges = <0 0x100>;
84 msi2: msi@41a00 {
85 compatible = "fsl,mpic-msi";
87 msi-available-ranges = <0 0x100>;
H A Dmpc8641si-post.dtsi75 msi@41600 {
76 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
78 msi@41800 {
79 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
81 msi@41a00 {
82 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
H A Dqoriq-mpic4.3.dtsi54 msi0: msi@41600 {
55 compatible = "fsl,mpic-msi-v4.3";
76 msi1: msi@41800 {
77 compatible = "fsl,mpic-msi-v4.3";
98 msi2: msi@41a00 {
99 compatible = "fsl,mpic-msi-v4.3";
120 msi3: msi@41c00 {
121 compatible = "fsl,mpic-msi-v4.3";
/f-stack/freebsd/arm/arm/
H A Dgic_acpi.c269 ACPI_MADT_GENERIC_MSI_FRAME *msi; in madt_gicv2m_handler() local
276 msi = (ACPI_MADT_GENERIC_MSI_FRAME *)entry; in madt_gicv2m_handler()
278 device_printf(dev, "frame: %x %lx %x %u %u\n", msi->MsiFrameId, in madt_gicv2m_handler()
279 msi->BaseAddress, msi->Flags, msi->SpiCount, msi->SpiBase); in madt_gicv2m_handler()
288 msi->BaseAddress, msi->BaseAddress + PAGE_SIZE - 1, in madt_gicv2m_handler()
/f-stack/freebsd/contrib/device-tree/src/arm64/broadcom/northstar2/
H A Dns2.dtsi142 msi-parent = <&v2m0>;
173 msi-parent = <&v2m0>;
191 msi-parent = <&v2m0>;
373 msi-controller;
382 msi-controller;
391 msi-controller;
400 msi-controller;
409 msi-controller;
418 msi-controller;
427 msi-controller;
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/f-stack/freebsd/contrib/device-tree/Bindings/misc/
H A Dfsl,qoriq-mc.txt32 The msi-map property is used to associate the devices with both the ITS
36 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
127 - msi-map: Maps an ICID to a GIC ITS and associated msi-specifier
131 (icid-base,gic-its,msi-base,length).
134 associated with the listed GIC ITS, with the msi-specifier
135 (i - icid-base + msi-base).
139 - msi-parent
147 use msi-map.
164 msi-controller;
174 /* define msi map for ICIDs 23-64 */
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