Searched refs:mio_rst_ctl (Results 1 – 2 of 2) sorted by relevance
426 cvmx_mio_rst_ctlx_t mio_rst_ctl; in cvmx_srio_initialize() local490 mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CNTLX(srio_port)); in cvmx_srio_initialize()494 mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(srio_port)); in cvmx_srio_initialize()495 mio_rst_ctl.s.rst_drv = 0; in cvmx_srio_initialize()496 mio_rst_ctl.s.rst_rcv = 0; in cvmx_srio_initialize()497 mio_rst_ctl.s.rst_chip = 0; in cvmx_srio_initialize()498 cvmx_write_csr(CVMX_MIO_RST_CTLX(srio_port), mio_rst_ctl.u64); in cvmx_srio_initialize()500 mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(srio_port)); in cvmx_srio_initialize()504 (mio_rst_ctl.s.prtmode) ? "host" : "endpoint"); in cvmx_srio_initialize()
907 cvmx_mio_rst_ctlx_t mio_rst_ctl; in __cvmx_pcie_rc_initialize_gen2() local983 mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(pcie_port)); in __cvmx_pcie_rc_initialize_gen2()984 …(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)) ? (mio_rst_ctl.s.prtmode != 1) : (!mio_rst_ctl… in __cvmx_pcie_rc_initialize_gen2()1486 cvmx_mio_rst_ctlx_t mio_rst_ctl; in cvmx_pcie_ep_initialize() local1488 mio_rst_ctl.u64 = cvmx_read_csr(CVMX_MIO_RST_CTLX(pcie_port)); in cvmx_pcie_ep_initialize()1489 …ep_mode = (OCTEON_IS_MODEL(OCTEON_CN61XX) ? (mio_rst_ctl.s.prtmode != 0) : mio_rst_ctl.s.host_mode… in cvmx_pcie_ep_initialize()