Searched refs:len_ctrl (Results 1 – 7 of 7) sorted by relevance
73 uint32_t len_ctrl; member155 uint32_t len_ctrl; member421 return p->len_ctrl & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in get_ena_eth_io_tx_desc_length()426 p->len_ctrl |= val & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in set_ena_eth_io_tx_desc_length()451 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_PHASE_MASK) >> ENA_ETH_IO_TX_DESC_PHASE_SHIFT; in get_ena_eth_io_tx_desc_phase()456 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_DESC_PHASE_MASK; in set_ena_eth_io_tx_desc_phase()461 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_FIRST_MASK) >> ENA_ETH_IO_TX_DESC_FIRST_SHIFT; in get_ena_eth_io_tx_desc_first()471 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_LAST_MASK) >> ENA_ETH_IO_TX_DESC_LAST_SHIFT; in get_ena_eth_io_tx_desc_last()476 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_DESC_LAST_MASK; in set_ena_eth_io_tx_desc_last()601 return p->len_ctrl & ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK; in get_ena_eth_io_tx_meta_desc_req_id_lo()[all …]
81 uint32_t len_ctrl; member163 uint32_t len_ctrl; member421 return p->len_ctrl & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in get_ena_eth_io_tx_desc_length()426 p->len_ctrl |= val & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in set_ena_eth_io_tx_desc_length()451 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_PHASE_MASK) >> ENA_ETH_IO_TX_DESC_PHASE_SHIFT; in get_ena_eth_io_tx_desc_phase()456 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_DESC_PHASE_MASK; in set_ena_eth_io_tx_desc_phase()461 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_FIRST_MASK) >> ENA_ETH_IO_TX_DESC_FIRST_SHIFT; in get_ena_eth_io_tx_desc_first()471 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_LAST_MASK) >> ENA_ETH_IO_TX_DESC_LAST_SHIFT; in get_ena_eth_io_tx_desc_last()476 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_DESC_LAST_MASK; in set_ena_eth_io_tx_desc_last()601 return p->len_ctrl & ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK; in get_ena_eth_io_tx_meta_desc_req_id_lo()[all …]
312 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_DESC_MASK; in ena_com_create_meta()314 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK; in ena_com_create_meta()321 meta_desc->len_ctrl |= ((ena_meta->mss >> 10) << in ena_com_create_meta()327 meta_desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_create_meta()331 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK; in ena_com_create_meta()480 desc->len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK; in ena_com_prepare_tx()488 desc->len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK; in ena_com_prepare_tx()500 desc->len_ctrl |= ((ena_tx_ctx->req_id >> 10) << in ena_com_prepare_tx()540 desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_prepare_tx()545 desc->len_ctrl |= ena_bufs->len & in ena_com_prepare_tx()[all …]
45 uint32_t len_ctrl; member127 uint32_t len_ctrl; member393 return p->len_ctrl & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in get_ena_eth_io_tx_desc_length()398 p->len_ctrl |= val & ENA_ETH_IO_TX_DESC_LENGTH_MASK; in set_ena_eth_io_tx_desc_length()423 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_PHASE_MASK) >> ENA_ETH_IO_TX_DESC_PHASE_SHIFT; in get_ena_eth_io_tx_desc_phase()428 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & ENA_ETH_IO_TX_DESC_PHASE_MASK; in set_ena_eth_io_tx_desc_phase()433 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_FIRST_MASK) >> ENA_ETH_IO_TX_DESC_FIRST_SHIFT; in get_ena_eth_io_tx_desc_first()443 return (p->len_ctrl & ENA_ETH_IO_TX_DESC_LAST_MASK) >> ENA_ETH_IO_TX_DESC_LAST_SHIFT; in get_ena_eth_io_tx_desc_last()448 p->len_ctrl |= (val << ENA_ETH_IO_TX_DESC_LAST_SHIFT) & ENA_ETH_IO_TX_DESC_LAST_MASK; in set_ena_eth_io_tx_desc_last()573 return p->len_ctrl & ENA_ETH_IO_TX_META_DESC_REQ_ID_LO_MASK; in get_ena_eth_io_tx_meta_desc_req_id_lo()[all …]
276 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_META_DESC_MASK; in ena_com_create_meta()278 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_EXT_VALID_MASK; in ena_com_create_meta()285 meta_desc->len_ctrl |= ((ena_meta->mss >> 10) << in ena_com_create_meta()291 meta_desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_create_meta()295 meta_desc->len_ctrl |= ENA_ETH_IO_TX_META_DESC_FIRST_MASK; in ena_com_create_meta()435 desc->len_ctrl |= ENA_ETH_IO_TX_DESC_FIRST_MASK; in ena_com_prepare_tx()443 desc->len_ctrl |= ENA_ETH_IO_TX_DESC_COMP_REQ_MASK; in ena_com_prepare_tx()455 desc->len_ctrl |= ((ena_tx_ctx->req_id >> 10) << in ena_com_prepare_tx()494 desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_prepare_tx()499 desc->len_ctrl |= ena_bufs->len & in ena_com_prepare_tx()[all …]
84 uint32_t len_ctrl; member90 uint32_t len_ctrl; member97 uint32_t len_ctrl; member
2501 tx_desc->tx_meta.len_ctrl = swap32_to_le(meta_word_0); in al_eth_tx_pkt_prepare()2555 tx_desc->tx.len_ctrl = swap32_to_le(flags_len); in al_eth_tx_pkt_prepare()2735 rx_desc->rx.len_ctrl = swap32_to_le(flags_len); in al_eth_rx_buffer_add()