| /f-stack/freebsd/mips/nlm/ |
| H A D | intr_machdep.c | 77 int irq; member
86 xlp_irq_to_irt(int irq) in xlp_irq_to_irt() argument
90 switch (irq) { in xlp_irq_to_irt()
119 xlp_enable_irq(int irq) in xlp_enable_irq() argument
168 KASSERT(irq > 0 && irq <= XLR_MAX_INTR, in xlp_set_bus_ack()
172 src = &xlp_interrupts[irq]; in xlp_set_bus_ack()
188 KASSERT(irq > 0 && irq <= XLR_MAX_INTR , in cpu_establish_hardintr()
195 src = &xlp_interrupts[irq]; in cpu_establish_hardintr()
202 if (XLP_IRQ_IS_PICINTR(irq)) in cpu_establish_hardintr()
216 src->irq = irq; in cpu_establish_hardintr()
[all …]
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| /f-stack/freebsd/arm/allwinner/a10/ |
| H A D | a10_intc.c | 98 u_int irq; member
188 u_int irq; in a10_intr() local
191 if (irq == -1 || irq > A10_INTR_MAX_NIRQS) { in a10_intr()
199 irq); in a10_intr()
222 uint32_t irq; in a10_intr_pic_attach() local
227 for (irq = 0; irq < A10_INTR_MAX_NIRQS; irq++) { in a10_intr_pic_attach()
228 sc->isrcs[irq].irq = irq; in a10_intr_pic_attach()
248 u_int irq = ((struct a10_intr_irqsrc *)isrc)->irq; in a10_intr_enable_intr() local
259 u_int irq = ((struct a10_intr_irqsrc *)isrc)->irq; in a10_intr_disable_intr() local
288 u_int irq = ((struct a10_intr_irqsrc *)isrc)->irq; in a10_intr_pre_ithread() local
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| /f-stack/freebsd/mips/mips/ |
| H A D | mips_pic.c | 88 u_int irq; member
193 for (irq = 0; irq < sc->nirqs; irq++) { in mips_pic_register_isrcs()
194 sc->pic_irqs[irq].irq = irq; in mips_pic_register_isrcs()
307 u_int irq; in mips_pic_disable_intr() local
309 irq = ((struct mips_pic_irqsrc *)isrc)->irq; in mips_pic_disable_intr()
316 u_int irq; in mips_pic_enable_intr() local
318 irq = ((struct mips_pic_irqsrc *)isrc)->irq; in mips_pic_enable_intr()
348 if (mpd->irq < 0 || mpd->irq >= sc->nirqs) in mips_pic_map_intr()
463 if (irq < 0 || irq >= nitems(mips_pic_intrs)) in mips_pic_map_fixed_intr()
693 if (irq < 0 || irq >= NHARD_IRQS) in cpu_establish_hardintr()
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| H A D | intr_machdep.c | 98 uintptr_t irq = (uintptr_t)source; in mips_mask_hard_irq() local
106 uintptr_t irq = (uintptr_t)source; in mips_unmask_hard_irq() local
114 uintptr_t irq = (uintptr_t)source; in mips_mask_soft_irq() local
185 if (irq < 0 || irq >= NHARD_IRQS) in cpu_establish_hardintr()
194 event = hardintr_events[irq]; in cpu_establish_hardintr()
198 NULL, NULL, "int%d", irq); in cpu_establish_hardintr()
201 hardintr_events[irq] = event; in cpu_establish_hardintr()
222 irq, filt, handler, arg); in cpu_establish_softintr()
224 if (irq < 0 || irq > NSOFT_IRQS) in cpu_establish_softintr()
227 event = softintr_events[irq]; in cpu_establish_softintr()
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| /f-stack/freebsd/mips/atheros/ar531x/ |
| H A D | apb.c | 143 for (irq = 0; irq < APB_NIRQS; irq++) { in apb_pic_register_isrcs()
144 sc->pic_irqs[irq].irq = irq; in apb_pic_register_isrcs()
396 int irq; in apb_setup_intr() local
495 for (irq = 0; irq < APB_NIRQS; irq++) { in apb_filter()
516 if (irq != 0 && irq != 6) in apb_filter()
584 int irq; in apb_hinted_child() local
661 u_int irq; in apb_pic_enable_intr() local
663 irq = ((struct apb_pic_irqsrc *)isrc)->irq; in apb_pic_enable_intr()
670 u_int irq; in apb_pic_disable_intr() local
672 irq = ((struct apb_pic_irqsrc *)isrc)->irq; in apb_pic_disable_intr()
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| /f-stack/freebsd/arm/freescale/imx/ |
| H A D | tzic.c | 60 u_int irq; member
96 tzic_write_4(sc, TZIC_ENCLEAR(irq >> 5), (1u << (irq & 0x1f))); in tzic_irq_mask()
103 tzic_write_4(sc, TZIC_ENSET(irq >> 5), (1u << (irq & 0x1f))); in tzic_irq_unmask()
110 int b, i, irq; in tzic_intr() local
118 irq = i * 32 + b; in tzic_intr()
142 u_int irq = ((struct tzic_irqsrc *)isrc)->irq; in tzic_enable_intr() local
152 u_int irq = ((struct tzic_irqsrc *)isrc)->irq; in tzic_disable_intr() local
155 tzic_irq_mask(sc, irq); in tzic_disable_intr()
208 u_int irq; in tzic_pic_attach() local
211 for (irq = 0; irq < TZIC_NIRQS; irq++) { in tzic_pic_attach()
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| H A D | imx_gpio.c | 183 u_int irq; in gpio_pic_map_fdt() local
239 u_int irq; in gpio_pic_map_gpio() local
288 u_int irq; in gpio_pic_map_intr() local
401 u_int irq; in gpio_pic_disable_intr() local
418 u_int irq; in gpio_pic_enable_intr() local
432 u_int irq; in gpio_pic_post_filter() local
500 for (irq = 0; irq < NGPIO; irq++) { in gpio_pic_register_isrcs()
501 sc->gpio_pic_irqsrc[irq].gi_irq = irq; in gpio_pic_register_isrcs()
839 for (irq = 0; irq < 2; irq++) { in imx51_gpio_attach()
879 int irq; in imx51_gpio_detach() local
[all …]
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| /f-stack/freebsd/arm/ti/ |
| H A D | aintc.c | 111 aintc_write_4(sc, INTC_MIR_SET(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_mask()
118 aintc_write_4(sc, INTC_MIR_CLEAR(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_unmask()
124 uint32_t irq; in ti_aintc_intr() local
137 irq &= INTC_SIR_ACTIVE_MASK; in ti_aintc_intr()
140 ti_aintc_irq_mask(sc, irq); in ti_aintc_intr()
155 arm_irq_memory_barrier(irq); in ti_aintc_enable_intr()
165 ti_aintc_irq_mask(sc, irq); in ti_aintc_disable_intr()
193 ti_aintc_irq_mask(sc, irq); in ti_aintc_pre_ithread()
216 uint32_t irq; in ti_aintc_pic_attach() local
221 for (irq = 0; irq < INTC_NIRQS; irq++) { in ti_aintc_pic_attach()
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| H A D | ti_pruss.c | 234 irq = cdev->si_drv1; in ti_pruss_irq_read()
243 mtx_lock(&irq->sc_mtx); in ti_pruss_irq_read()
265 error = msleep(irq, &irq->sc_mtx, PCATCH | PDROP, in ti_pruss_irq_read()
270 mtx_lock(&irq->sc_mtx); in ti_pruss_irq_read()
288 int irq; member
339 sc->sc_irq_devs[irq].sc_pdev->si_drv1 = &sc->sc_irq_devs[irq]; in ti_pruss_interrupts_enable()
367 const int8_t irq = arg2; in ti_pruss_event_map() local
419 const int8_t irq = arg2; in ti_pruss_channel_map() local
453 irq, channelnr); in ti_pruss_channel_map()
466 const int8_t irq = arg2; in ti_pruss_interrupt_enable() local
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| /f-stack/freebsd/mips/cavium/ |
| H A D | ciu.c | 217 int irq; in ciu_setup_intr() local
243 irq, mask_func, unmask_func, NULL, bind_func, "int%d", irq); in ciu_setup_intr()
278 int irq; in ciu_bind_intr() local
297 int irq; in ciu_describe_intr() local
327 int irq; in ciu_en0_intr_mask() local
329 irq = (uintptr_t)arg; in ciu_en0_intr_mask()
339 int irq; in ciu_en0_intr_unmask() local
353 int irq; in ciu_en0_intr_bind() local
373 int irq; in ciu_en1_intr_mask() local
385 int irq; in ciu_en1_intr_unmask() local
[all …]
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| /f-stack/dpdk/drivers/bus/dpaa/base/qbman/ |
| H A D | dpaa_sys.c | 12 int irq; member
13 irqreturn_t (*isr)(int irq, void *arg);
23 static void process_interrupt_install(struct process_interrupt *irq) in process_interrupt_install() argument
29 list_add_tail(&irq->node, &process_irq_list); in process_interrupt_install()
40 list_del(&irq->node); in process_interrupt_remove()
53 if (i->irq == irq_num) in process_interrupt_find()
65 int qbman_request_irq(int irq, irqreturn_t (*isr)(int irq, void *arg), in qbman_request_irq() argument
74 irq_node->irq = irq; in qbman_request_irq()
83 int qbman_free_irq(int irq, __maybe_unused void *arg) in qbman_free_irq() argument
97 void qbman_invoke_irq(int irq) in qbman_invoke_irq() argument
[all …]
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| /f-stack/freebsd/arm/arm/ |
| H A D | gic.c | 205 for (irq = 0; irq < sc->nirqs; irq += 4) in arm_gic_init_secondary()
209 for (irq = 0; GIC_SUPPORT_SECEXT(sc) && irq < sc->nirqs; irq += 32) { in arm_gic_init_secondary()
223 for (irq = GIC_FIRST_SGI; irq <= GIC_LAST_SGI; irq++) in arm_gic_init_secondary()
228 for (irq = GIC_FIRST_PPI; irq <= GIC_LAST_PPI; irq++) in arm_gic_init_secondary()
247 for (irq = 0; irq < num; irq++) { in arm_gic_register_isrcs()
248 irqs[irq].gi_irq = irq; in arm_gic_register_isrcs()
744 u_int irq; in gic_map_intr() local
773 irq = daa->irq; in gic_map_intr()
1099 for (irq = sc->sc_spi_start; irq < sc->sc_spi_end; irq++) { in arm_gicv2m_alloc_msi()
1179 int irq; in arm_gicv2m_alloc_msix() local
[all …]
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| H A D | pmu.c | 114 if (sc->irq[i].res == NULL) in pmu_attach()
116 err = bus_setup_intr(dev, sc->irq[i].res, in pmu_attach()
118 &sc->irq[i].ih); in pmu_attach()
124 if (sc->irq[i].cpuid != -1) { in pmu_attach()
125 err = bus_bind_intr(dev, sc->irq[i].res, in pmu_attach()
126 sc->irq[i].cpuid); in pmu_attach()
153 if (sc->irq[i].ih != NULL) in pmu_attach()
154 bus_teardown_intr(dev, sc->irq[i].res, sc->irq[i].ih); in pmu_attach()
155 if (sc->irq[i].res != NULL) in pmu_attach()
157 sc->irq[i].res); in pmu_attach()
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| /f-stack/freebsd/arm64/arm64/ |
| H A D | gic_v3.c | 258 u_int irq; in gic_v3_attach() local
311 for (irq = 0; irq < sc->gic_nirqs; irq++) { in gic_v3_attach()
314 sc->gic_irqs[irq].gi_irq = irq; in gic_v3_attach()
338 for (irq = sc->gic_mbi_start; irq <= sc->gic_mbi_end; irq++) { in gic_v3_attach()
641 irq = daa->irq; in do_gic_v3_map_intr()
746 if (irq >= GIC_FIRST_PPI && irq <= GIC_LAST_SPI) { in gic_v3_setup_intr()
925 for (irq = GIC_FIRST_SGI; irq <= GIC_LAST_SGI; irq++) { in gic_v3_init_secondary()
932 for (irq = GIC_FIRST_PPI; irq <= GIC_LAST_PPI; irq++) { in gic_v3_init_secondary()
1332 for (irq = sc->gic_mbi_start; irq < sc->gic_mbi_end; irq++) { in gic_v3_alloc_msi()
1411 int irq; in gic_v3_alloc_msix() local
[all …]
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| /f-stack/freebsd/mips/atheros/ |
| H A D | apb.c | 292 int irq, error; in apb_setup_intr() local
296 if (irq > APB_IRQ_END) in apb_setup_intr()
301 error = intr_event_create(&event, (void *)irq, 0, irq, in apb_setup_intr()
329 int irq, result; in apb_teardown_intr() local
332 if (irq > APB_IRQ_END) in apb_teardown_intr()
352 uint32_t reg, irq; in apb_filter() local
357 for (irq = 0; irq < APB_NIRQS; irq++) { in apb_filter()
358 if (reg & (1 << irq)) { in apb_filter()
374 (1 << irq)); in apb_filter()
394 if (irq != 0 && irq != 8 && irq != 9 && irq != 10) in apb_filter()
[all …]
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| /f-stack/freebsd/x86/isa/ |
| H A D | elcr.c | 55 #define ELCR_MASK(irq) (1 << (irq)) argument
95 elcr_read_trigger(u_int irq) in elcr_read_trigger() argument
99 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq)); in elcr_read_trigger()
100 if (elcr_status & ELCR_MASK(irq)) in elcr_read_trigger()
111 elcr_write_trigger(u_int irq, enum intr_trigger trigger) in elcr_write_trigger() argument
116 KASSERT(irq <= 15, ("%s: invalid IRQ %u", __func__, irq)); in elcr_write_trigger()
118 new_status = elcr_status | ELCR_MASK(irq); in elcr_write_trigger()
120 new_status = elcr_status & ~ELCR_MASK(irq); in elcr_write_trigger()
124 if (irq >= 8) in elcr_write_trigger()
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| /f-stack/freebsd/i386/pci/ |
| H A D | pci_pir.c | 86 int irq);
314 uint8_t irq, pin; in pci_pir_initial_irqs() local
319 if (irq == PCI_INVALID_IRQ || irq == pci_link->pl_irq) in pci_pir_initial_irqs()
341 pci_link->pl_irq = irq; in pci_pir_initial_irqs()
385 int i, irq; in pci_pir_parse() local
422 if (irq == 0) in pci_pir_parse()
492 int error, irq; in pci_pir_route_interrupt() local
570 int i, irq, realmask; in pci_pir_choose_irq() local
578 irq = PCI_INVALID_IRQ; in pci_pir_choose_irq()
584 irq = i; in pci_pir_choose_irq()
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| /f-stack/freebsd/mips/mediatek/ |
| H A D | mtk_intr_v1.c | 73 u_int irq; member
85 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) argument
125 WRITE4(sc, MTK_INTENA, (1u << (irq))); in pic_irq_unmask()
145 uint32_t irq; in mtk_pic_register_isrcs() local
150 for (irq = 0; irq < sc->nirqs; irq++) { in mtk_pic_register_isrcs()
151 sc->pic_irqs[irq].irq = irq; in mtk_pic_register_isrcs()
152 isrc = PIC_INTR_ISRC(sc, irq); in mtk_pic_register_isrcs()
300 u_int irq; in mtk_pic_enable_intr() local
302 irq = ((struct mtk_pic_irqsrc *)isrc)->irq; in mtk_pic_enable_intr()
309 u_int irq; in mtk_pic_disable_intr() local
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| H A D | mtk_intr_v2.c | 73 u_int irq; member
85 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) argument
120 WRITE4(sc, MTK_INTENA, (1u << (irq))); in pic_irq_unmask()
140 uint32_t irq; in mtk_pic_register_isrcs() local
145 for (irq = 0; irq < sc->nirqs; irq++) { in mtk_pic_register_isrcs()
146 sc->pic_irqs[irq].irq = irq; in mtk_pic_register_isrcs()
147 isrc = PIC_INTR_ISRC(sc, irq); in mtk_pic_register_isrcs()
295 u_int irq; in mtk_pic_enable_intr() local
297 irq = ((struct mtk_pic_irqsrc *)isrc)->irq; in mtk_pic_enable_intr()
304 u_int irq; in mtk_pic_disable_intr() local
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| H A D | mtk_intr_gic.c | 82 u_int irq; member
94 #define GIC_INTR_ISRC(sc, irq) (&(sc)->gic_irqs[(irq)].isrc) argument
127 WRITE4(sc, MTK_INTENA, (1u << (irq))); in gic_irq_unmask()
148 uint32_t irq; in mtk_gic_register_isrcs() local
153 for (irq = 0; irq < sc->nirqs; irq++) { in mtk_gic_register_isrcs()
154 sc->gic_irqs[irq].irq = irq; in mtk_gic_register_isrcs()
155 isrc = GIC_INTR_ISRC(sc, irq); in mtk_gic_register_isrcs()
290 u_int irq; in mtk_gic_enable_intr() local
292 irq = ((struct mtk_gic_irqsrc *)isrc)->irq; in mtk_gic_enable_intr()
299 u_int irq; in mtk_gic_disable_intr() local
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| /f-stack/freebsd/mips/ingenic/ |
| H A D | jz4780_intr.c | 67 u_int irq; member
78 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc) argument
110 if (irq < 32) in pic_irq_unmask()
111 WRITE4(sc, JZ_ICMCR0, (1u << irq)); in pic_irq_unmask()
119 if (irq < 32) in pic_irq_mask()
135 uint32_t irq, i; in jz4780_pic_register_isrcs() local
140 for (irq = 0; irq < sc->nirqs; irq++) { in jz4780_pic_register_isrcs()
141 sc->pic_irqs[irq].irq = irq; in jz4780_pic_register_isrcs()
142 isrc = PIC_INTR_ISRC(sc, irq); in jz4780_pic_register_isrcs()
144 name, irq); in jz4780_pic_register_isrcs()
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| /f-stack/freebsd/arm/mv/ |
| H A D | mv_ap806_sei.c | 73 u_int irq; member
117 WR4(sc, GICP_SECR(sisrc->irq), GICP_SECR_BIT(sisrc->irq)); in mv_ap806_sei_isrc_eoi()
147 u_int irq; in mv_ap806_sei_map() local
159 *irqp = irq; in mv_ap806_sei_map()
169 u_int irq; in mv_ap806_sei_map_intr() local
186 u_int irq; in mv_ap806_sei_setup_intr() local
196 if (irq != sisrc->irq) in mv_ap806_sei_setup_intr()
265 u_int irq; in mv_ap806_sei_intr() local
276 irq--; in mv_ap806_sei_intr()
343 for (irq = 0; irq < MV_AP806_SEI_MAX_NIRQS; irq++) { in mv_ap806_sei_attach()
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| /f-stack/freebsd/arm/broadcom/bcm2835/ |
| H A D | bcm2835_intr.c | 217 int irq, num; in bcm2835_intc_intr() local
222 if (irq == -1) in bcm2835_intc_intr()
228 irq); in bcm2835_intc_intr()
259 u_int irq; in bcm_intc_map_intr() local
269 irq = daf->cells[0]; in bcm_intc_map_intr()
274 irq = daf->cells[1]; in bcm_intc_map_intr()
280 if (irq > BANK1_END) in bcm_intc_map_intr()
285 if (irq > BANK2_END) in bcm_intc_map_intr()
335 uint32_t irq; in bcm_intc_pic_register() local
339 for (irq = 0; irq < BCM_INTC_NIRQS; irq++) { in bcm_intc_pic_register()
[all …]
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| /f-stack/freebsd/x86/xen/ |
| H A D | xen_nexus.c | 93 nexus_xen_config_intr(device_t dev, int irq, enum intr_trigger trig, in nexus_xen_config_intr() argument
102 if ((irq < first_msi_irq) && (intr_lookup_source(irq) == NULL)) { in nexus_xen_config_intr()
103 ret = xen_register_pirq(irq, trig, pol); in nexus_xen_config_intr()
106 nexus_add_irq(irq); in nexus_xen_config_intr()
108 return (intr_config_intr(irq, trig, pol)); in nexus_xen_config_intr()
112 nexus_xen_alloc_msix(device_t pcib, device_t dev, int *irq) in nexus_xen_alloc_msix() argument
115 return (xen_msix_alloc(dev, irq)); in nexus_xen_alloc_msix()
119 nexus_xen_release_msix(device_t pcib, device_t dev, int irq) in nexus_xen_release_msix() argument
122 return (xen_msix_release(irq)); in nexus_xen_release_msix()
140 nexus_xen_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, uint32_t *data) in nexus_xen_map_msi() argument
[all …]
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| /f-stack/freebsd/mips/malta/ |
| H A D | gt_pci.c | 108 int irq; member
161 int irq = cookie->irq; in gt_pci_mask_irq() local
174 int irq = cookie->irq; in gt_pci_unmask_irq() local
208 int irq; in gt_pci_intr() local
219 irq = OCW3_POLL_IRQ(irq); in gt_pci_intr()
227 irq = OCW3_POLL_IRQ(irq) + 8; in gt_pci_intr()
246 irq = 2; in gt_pci_intr()
703 if (irq >= ICU_LEN || irq == 2) in gt_pci_setup_intr()
707 sc->sc_intr_cookies[irq].irq = irq; in gt_pci_setup_intr()
711 (void *)&sc->sc_intr_cookies[irq], 0, irq, in gt_pci_setup_intr()
[all …]
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