| /f-stack/freebsd/contrib/device-tree/src/mips/loongson/ |
| H A D | ls7a-pch.dtsi | 16 interrupt-controller;
17 interrupt-parent = <&htvec>;
19 #interrupt-cells = <2>;
27 #interrupt-cells = <2>;
44 interrupt-parent = <&pic>;
55 interrupt-parent = <&pic>;
200 #interrupt-cells = <1>;
215 #interrupt-cells = <1>;
230 #interrupt-cells = <1>;
245 #interrupt-cells = <1>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/powerpc/ |
| H A D | fsp2.dts | 64 #interrupt-cells = <2>;
66 interrupt-controller;
79 interrupt-controller;
93 interrupt-controller;
107 interrupt-controller;
121 interrupt-controller;
134 interrupt-controller;
147 interrupt-controller;
161 interrupt-controller;
465 /* index interrupt-parent interrupt# type */
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | ti,c64x+megamod-pic.txt | 14 - #interrupt-cells: <1>
24 interrupt-controller;
25 #interrupt-cells = <1>;
34 combine up to 32 interrupt inputs into a single interrupt output which
39 the core interrupt controller. When an individual interrupt is cascaded,
46 - interrupt-controller
47 - #interrupt-cells: <1>
76 interrupt-controller;
85 to interrupt 13, etc.
90 interrupt-controller;
[all …]
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| H A D | marvell,orion-intc.txt | 3 * Main interrupt controller
8 - interrupt-controller: identifies the node as an interrupt controller
9 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
11 The interrupt sources map to the corresponding bits in the interrupt
20 interrupt-controller;
21 #interrupt-cells = <1>;
31 - interrupts: bridge interrupt of the main interrupt controller
32 - interrupt-controller: identifies the node as an interrupt controller
33 - #interrupt-cells: number of cells to encode an interrupt source, shall be 1
42 interrupt-controller;
[all …]
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| H A D | brcm,bcm7120-l2-intc.txt | 3 This interrupt controller hardware is a second level interrupt controller that
12 directly output an interrupt signal towards the interrupt controller parent,
13 or if they will output an interrupt signal at this 2nd level interrupt
20 - not all bits within the interrupt controller actually map to an interrupt
56 - interrupt-controller: identifies the node as an interrupt controller
57 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
59 - interrupts: specifies the interrupt line(s) in the interrupt-parent controller
73 respective interrupt outputs bypass this 2nd level interrupt controller
81 interrupt-parent = <&intc>;
82 #interrupt-cells = <1>;
[all …]
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| H A D | sigma,smp8642-intc.txt | 14 - #interrupt-cells: should be <2>, interrupt index and flags per interrupts.txt
15 - interrupts: interrupt spec of primary interrupt controller
19 interrupt-controller@6e000 {
23 interrupt-parent = <&gic>;
24 interrupt-controller;
30 interrupt-controller;
31 #interrupt-cells = <2>;
37 interrupt-controller;
38 #interrupt-cells = <2>;
44 interrupt-controller;
[all …]
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| H A D | samsung,exynos4210-combiner.txt | 4 can combine interrupt sources as a group and provide a single interrupt request
6 interrupt controller, such as GIC in case of Exynos4210.
10 combined interrupt for its eight interrupt sources. The combined interrupt
11 is usually connected to a parent interrupt controller.
18 up to 8 interrupt sources).
22 - interrupt-controller: Identifies the node as an interrupt controller.
28 connected to a parent interrupt controller. The format of the interrupt
29 specifier depends in the interrupt parent controller.
41 combiner:interrupt-controller@10440000 {
43 interrupt-controller;
[all …]
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| H A D | marvell,icu.txt | 36 - interrupt-controller: Identifies the node as an interrupt
55 #interrupt-cells = <2>;
56 interrupt-controller;
63 #interrupt-cells = <2>;
64 interrupt-controller;
70 interrupt-parent = <&icu_nsr>;
75 interrupt-parent = <&icu_sei>;
81 interrupt-parent = <&icu_nsr>;
104 #interrupt-cells = <3>;
105 interrupt-controller;
[all …]
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| H A D | interrupts.txt | 11 properties contain a list of interrupt specifiers, one per output interrupt. The
12 format of the interrupt specifier is determined by the interrupt controller to
16 interrupt-parent = <&intc1>;
26 to reference multiple interrupt parents or a different interrupt parent than
36 A device is marked as an interrupt controller with the "interrupt-controller"
53 interrupt-controller;
54 #interrupt-cells = <1>;
60 interrupt-controller;
61 #interrupt-cells = <1>;
91 interrupt-controller;
[all …]
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| H A D | mrvl,intc.txt | 14 interrupt controller.
19 - interrupt-controller : Identifies the node as an interrupt controller.
21 interrupt source.
30 interrupt-controller;
31 #interrupt-cells = <1>;
39 interrupt-controller;
40 #interrupt-cells = <1>;
52 - interrupt-controller : Declare this node to be an interrupt controller.
58 intc: interrupt-controller {
60 interrupt-controller;
[all …]
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| H A D | nxp,lpc3220-mic.txt | 6 - interrupt-controller: identifies the node as an interrupt controller.
7 - #interrupt-cells: the number of cells to define an interrupt, should be 2.
26 interrupt-controller;
27 #interrupt-cells = <2>;
33 interrupt-controller;
34 #interrupt-cells = <2>;
36 interrupt-parent = <&mic>;
44 interrupt-controller;
45 #interrupt-cells = <2>;
47 interrupt-parent = <&mic>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm7358.dtsi | 28 interrupt-controller;
29 #interrupt-cells = <1>;
57 interrupt-controller;
58 #interrupt-cells = <1>;
67 interrupt-controller;
68 #interrupt-cells = <1>;
92 interrupt-controller;
93 #interrupt-cells = <1>;
108 interrupt-controller;
230 interrupt-controller;
[all …]
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| H A D | bcm7346.dtsi | 34 interrupt-controller;
35 #interrupt-cells = <1>;
63 interrupt-controller;
64 #interrupt-cells = <1>;
73 interrupt-controller;
74 #interrupt-cells = <1>;
98 interrupt-controller;
99 #interrupt-cells = <1>;
114 interrupt-controller;
246 interrupt-controller;
[all …]
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| H A D | bcm7125.dtsi | 34 interrupt-controller;
35 #interrupt-cells = <1>;
63 interrupt-controller;
64 #interrupt-cells = <1>;
73 interrupt-controller;
74 #interrupt-cells = <1>;
98 interrupt-controller;
99 #interrupt-cells = <1>;
212 #interrupt-cells = <2>;
214 interrupt-controller;
[all …]
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| H A D | bcm7360.dtsi | 28 interrupt-controller;
29 #interrupt-cells = <1>;
57 interrupt-controller;
58 #interrupt-cells = <1>;
67 interrupt-controller;
68 #interrupt-cells = <1>;
92 interrupt-controller;
93 #interrupt-cells = <1>;
108 interrupt-controller;
222 interrupt-controller;
[all …]
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| H A D | bcm7362.dtsi | 34 interrupt-controller;
35 #interrupt-cells = <1>;
63 interrupt-controller;
64 #interrupt-cells = <1>;
73 interrupt-controller;
74 #interrupt-cells = <1>;
98 interrupt-controller;
99 #interrupt-cells = <1>;
114 interrupt-controller;
218 interrupt-controller;
[all …]
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| H A D | bcm7420.dtsi | 34 interrupt-controller;
35 #interrupt-cells = <1>;
63 interrupt-controller;
64 #interrupt-cells = <1>;
73 interrupt-controller;
74 #interrupt-cells = <1>;
99 interrupt-controller;
100 #interrupt-cells = <1>;
228 #interrupt-cells = <2>;
230 interrupt-controller;
[all …]
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| H A D | bcm7435.dtsi | 46 interrupt-controller;
47 #interrupt-cells = <1>;
76 interrupt-controller;
77 #interrupt-cells = <1>;
86 interrupt-controller;
87 #interrupt-cells = <1>;
115 interrupt-controller;
116 #interrupt-cells = <1>;
131 interrupt-controller;
260 interrupt-controller;
[all …]
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| H A D | bcm7425.dtsi | 34 interrupt-controller;
35 #interrupt-cells = <1>;
63 interrupt-controller;
64 #interrupt-cells = <1>;
73 interrupt-controller;
74 #interrupt-cells = <1>;
100 interrupt-controller;
101 #interrupt-cells = <1>;
116 interrupt-controller;
245 interrupt-controller;
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | exynos5410-pinctrl.dtsi | 16 interrupt-controller;
17 #interrupt-cells = <2>;
24 interrupt-controller;
25 #interrupt-cells = <2>;
32 interrupt-controller;
40 interrupt-controller;
48 interrupt-controller;
56 interrupt-controller;
64 interrupt-controller;
72 interrupt-controller;
[all …]
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| H A D | arm-realview-pba8.dts | 45 interrupt-parent = <&intc>;
53 #interrupt-cells = <3>;
55 interrupt-controller;
62 interrupt-parent = <&intc>;
67 interrupt-parent = <&intc>;
80 interrupt-parent = <&intc>;
85 interrupt-parent = <&intc>;
90 interrupt-parent = <&intc>;
95 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpic.txt | 9 additional cells in the interrupt specifier defining interrupt type
29 - interrupt-controller
35 - #interrupt-cells
73 - last-interrupt-source
102 <3rd-cell> interrupt-type
143 - For interrupt-type 1 (error interrupt),
154 interrupt-controller;
155 #interrupt-cells = <4>;
170 * To compute the interrupt specifier interrupt number
222 * Definition of an error interrupt (interrupt type 1).
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/net/wireless/ |
| H A D | qcom,ath11k.yaml | 27 - description: misc-pulse1 interrupt events
28 - description: misc-latch interrupt events
29 - description: sw exception interrupt events
30 - description: watchdog interrupt events
31 - description: interrupt event for ring CE0
32 - description: interrupt event for ring CE1
33 - description: interrupt event for ring CE2
34 - description: interrupt event for ring CE3
81 interrupt-names:
149 - interrupt-names
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/pci/ |
| H A D | xilinx-pcie.txt | 12 - interrupt-map-mask,
14 PCI interface to interrupt numbers.
26 - interrupt-controller: identifies the node as an interrupt controller
34 created a interrupt controller node to support 'interrupt-map' DT
45 #interrupt-cells = <1>;
50 interrupt-map-mask = <0 0 0 7>;
58 interrupt-controller;
60 #interrupt-cells = <1>;
69 #interrupt-cells = <1>;
83 interrupt-controller;
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/mips/img/ |
| H A D | boston.dts | 46 #interrupt-cells = <1>;
48 interrupt-parent = <&gic>;
63 interrupt-controller;
65 #interrupt-cells = <1>;
76 #interrupt-cells = <1>;
93 interrupt-controller;
95 #interrupt-cells = <1>;
106 #interrupt-cells = <1>;
123 interrupt-controller;
185 interrupt-controller;
[all …]
|