1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2001-2020 Intel Corporation 3 */ 4 5 #ifndef _ICE_SBQ_CMD_H_ 6 #define _ICE_SBQ_CMD_H_ 7 8 /* This header file defines the Sideband Queue commands, error codes and 9 * descriptor format. It is shared between Firmware and Software. 10 */ 11 12 /* Sideband Queue command structure and opcodes */ 13 enum ice_sbq_opc { 14 /* Sideband Queue commands */ 15 ice_sbq_opc_neigh_dev_req = 0x0C00, 16 ice_sbq_opc_neigh_dev_ev = 0x0C01 17 }; 18 19 /* Sideband Queue descriptor. Indirect command 20 * and non posted 21 */ 22 struct ice_sbq_cmd_desc { 23 __le16 flags; 24 __le16 opcode; 25 __le16 datalen; 26 __le16 cmd_retval; 27 28 /* Opaque message data */ 29 __le32 cookie_high; 30 __le32 cookie_low; 31 32 union { 33 __le16 cmd_len; 34 __le16 cmpl_len; 35 } param0; 36 37 u8 reserved[6]; 38 __le32 addr_high; 39 __le32 addr_low; 40 }; 41 42 struct ice_sbq_evt_desc { 43 __le16 flags; 44 __le16 opcode; 45 __le16 datalen; 46 __le16 cmd_retval; 47 u8 data[24]; 48 }; 49 50 enum ice_sbq_msg_dev { 51 rmn_0 = 0x02, 52 rmn_1 = 0x03, 53 rmn_2 = 0x04, 54 cgu = 0x06 55 }; 56 57 enum ice_sbq_msg_opcode { 58 ice_sbq_msg_rd = 0x00, 59 ice_sbq_msg_wr = 0x01 60 }; 61 62 #define ICE_SBQ_MSG_FLAGS 0x40 63 #define ICE_SBQ_MSG_SBE_FBE 0x0F 64 65 struct ice_sbq_msg_req { 66 u8 dest_dev; 67 u8 src_dev; 68 u8 opcode; 69 u8 flags; 70 u8 sbe_fbe; 71 u8 func_id; 72 __le16 msg_addr_low; 73 __le32 msg_addr_high; 74 __le32 data; 75 }; 76 77 struct ice_sbq_msg_cmpl { 78 u8 dest_dev; 79 u8 src_dev; 80 u8 opcode; 81 u8 flags; 82 __le32 data; 83 }; 84 85 /* Internal struct */ 86 struct ice_sbq_msg_input { 87 u8 dest_dev; 88 u8 opcode; 89 u16 msg_addr_low; 90 u32 msg_addr_high; 91 u32 data; 92 }; 93 #endif /* _ICE_SBQ_CMD_H_ */ 94