| /f-stack/freebsd/contrib/device-tree/Bindings/leds/ |
| H A D | leds-bcm6328.txt | 8 by hardware using this driver.
15 with 0 meaning hardware control enabled and 1 hardware control disabled. This
57 - brcm,hardware-controlled : Boolean, makes this LED hardware controlled.
98 brcm,hardware-controlled;
102 brcm,hardware-controlled;
106 brcm,hardware-controlled;
110 brcm,hardware-controlled;
126 brcm,hardware-controlled;
131 brcm,hardware-controlled;
161 brcm,hardware-controlled;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/spi/ |
| H A D | spi-sprd-adi.txt | 5 framework for its hardware implementation is alike to SPI bus and its timing
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
14 triggered by hardware components instead of ADI software channels.
17 channels, the first value specifies the hardware channel id which is used to
19 the analog chip address where user want to access by hardware components.
30 thus change the hardware spinlock support to be optional to keep backward
46 The first value specifies the hardware channel id which is used to
47 transfer data triggered by hardware automatically, and the second
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm63268-comtrend-vr-3032u.dts | 29 brcm,hardware-controlled;
35 brcm,hardware-controlled;
66 brcm,hardware-controlled;
71 brcm,hardware-controlled;
76 brcm,hardware-controlled;
81 brcm,hardware-controlled;
86 brcm,hardware-controlled;
91 brcm,hardware-controlled;
96 brcm,hardware-controlled;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/crypto/ |
| H A D | brcm,spu-crypto.txt | 1 The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
7 brcm,spum-crypto - for devices with SPU-M hardware
8 brcm,spu2-crypto - for devices with SPU2 hardware
9 brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3
11 brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
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| /f-stack/freebsd/contrib/device-tree/Bindings/serial/ |
| H A D | nvidia,tegra194-tcu.txt | 3 The TCU is a system for sharing a hardware UART instance among multiple
7 with the hardware implementing the TCU.
16 "rx" - Mailbox for receiving data from hardware UART
17 "tx" - Mailbox for transmitting data to hardware UART
|
| H A D | sirf-uart.txt | 8 - fifosize : Should define hardware rx/tx fifo size
12 - uart-has-rtscts: we have hardware flow controller pins in hardware
|
| /f-stack/freebsd/contrib/device-tree/Bindings/arm/msm/ |
| H A D | qcom,saw2.txt | 4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable
5 power-controller that transitions a piece of hardware (like a processor or
10 Multiple revisions of the SAW hardware are supported using these Device Nodes.
13 data due the the differences in hardware capabilities. Hence the SoC name, the
14 version of the SAW hardware in that SoC and the distinction between cpu (big
|
| /f-stack/dpdk/doc/guides/cryptodevs/ |
| H A D | dpaa2_sec.rst | 10 hardware accelerator.
16 acceleration and offloading hardware. It combines functions previously
20 integrity checking, and a hardware random number generator. SEC performs
24 DPAA2_SEC is one of the hardware resource in DPAA2 Architecture. More information
28 portal to access the hardware object - DPSECI. The MC provides access to create,
31 DPAA2_SEC PMD also uses some of the other hardware resources like buffer pools,
32 queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
|
| H A D | dpaa_sec.rst | 10 hardware accelerator.
16 acceleration and offloading hardware. It combines functions previously
20 integrity checking, and a hardware random number generator. SEC performs
24 DPAA_SEC is one of the hardware resource in DPAA Architecture. More information
30 DPAA_SEC PMD also uses some of the other hardware resources like buffer pools,
31 queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/gpio/ |
| H A D | sgpio-aspeed.txt | 23 - ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose
24 2 software GPIOs per hardware GPIO: one for hardware input, one for hardware
|
| H A D | gpio-altera.txt | 12 - #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
16 hardware is synthesized. This field is required if the Altera GPIO controller
18 but hardware synthesized. Required if GPIO is used as an interrupt
|
| /f-stack/freebsd/contrib/device-tree/Bindings/dma/ |
| H A D | snps-dma.txt | 7 - dma-channels: Number of channels supported by hardware
16 - data-width: Maximum data width supported by hardware per AHB master
21 - data_width: Maximum data width supported by hardware per AHB master
26 - multi-block: Multi block transfers supported by hardware. Array property with
|
| H A D | snps,dw-axi-dmac.txt | 8 - dma-channels: Number of channels supported by hardware.
9 - snps,dma-masters: Number of AXI masters supported by the hardware.
10 - snps,data-width: Maximum AXI data width supported by hardware.
|
| /f-stack/freebsd/contrib/device-tree/Bindings/reset/ |
| H A D | st,sti-softreset.txt | 9 The actual action taken when softreset is asserted is hardware dependent.
10 However, when asserted it may not be possible to access the hardware's
11 registers and after an assert/deassert sequence the hardware's previous state
|
| H A D | st,sti-picophyreset.txt | 8 The actual action taken when softreset is asserted is hardware dependent.
9 However, when asserted it may not be possible to access the hardware's
10 registers and after an assert/deassert sequence the hardware's previous state
|
| H A D | st,sti-powerdown.txt | 10 The actual action taken when powerdown is asserted is hardware dependent.
11 However, when asserted it may not be possible to access the hardware's
12 registers and after an assert/deassert sequence the hardware's previous state
|
| H A D | img,pistachio-reset.txt | 8 The actual action taken when soft reset is asserted is hardware dependent.
9 However, when asserted it may not be possible to access the hardware's
10 registers, and following an assert/deassert sequence the hardware's previous
|
| /f-stack/freebsd/contrib/device-tree/Bindings/watchdog/ |
| H A D | atmel-sama5d4-wdt.txt | 10 - atmel,watchdog-type: should be "hardware" or "software".
11 "hardware": enable watchdog fault reset. A watchdog fault triggers
31 atmel,watchdog-type = "hardware";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/sound/ |
| H A D | ti,tas5086.txt | 12 assert a hardware reset at probe time.
16 split-capacitor charge period. The hardware chip
20 When not specified, the hardware default of 1300ms
|
| /f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinmux-node.yaml | 45 pin controller hardware. For hardware where there is a large number of identical
51 binding with a hardware based index and a number of pin configuration values:
75 The index for pinctrl-pin-array must relate to the hardware for the pinctrl
80 For hardware where pin multiplexing configurations have to be specified for
114 specific binding for the hardware defines whether the entries are integers
|
| H A D | pincfg-node.yaml | 16 for all hardware or binding structures. Each individual binding document
37 description: pull up the pin. Takes as optional argument on hardware
44 description: pull down the pin. Takes as optional argument on hardware
52 hardware supporting it the pull strength in Ohm.
125 sleep-hardware-state:
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| /f-stack/dpdk/doc/guides/nics/ |
| H A D | dpaa2.rst | 33 DPAA2 is a hardware architecture designed for high-speed network
41 software drivers to use the DPAA2 hardware.
43 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
124 of the DPRC, discover the hardware objects present (including mappable
164 efficient use of finite hardware resources, flexibility, and
199 hardware device that connects to an Ethernet PHY and allows
229 DPBP (Datapath Buffer Pool): represents a hardware buffer
277 interrupts. At the hardware level message interrupts
279 1) a non-spoofable 'device-id' expressed on the hardware
383 create a hardware offloaded packet buffer mempool.
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/mips/brcm/ |
| H A D | soc.txt | 23 This hardware provides control registers for the "always-on" (even in low-power
24 modes) hardware, such as the Power Management State Machine (PMSM).
44 each of which may have several associated hardware blocks, which are versioned
48 associated with a number of hardware register resources (e.g., its PHY.
84 Should contain subnodes for any of the following relevant hardware resources:
|
| /f-stack/freebsd/contrib/device-tree/Bindings/net/ |
| H A D | brcm,unimac-mdio.txt | 20 to this hardware block, or must be "mdio_done" for the first interrupt and
24 hardware, if absent, the default hardware values are used
|
| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ti/ |
| H A D | gate.txt | 21 "ti,dss-gate-clock" - gate clock with DSS specific hardware handling
22 "ti,am35xx-gate-clock" - gate clock with AM35xx specific hardware handling
26 "ti,hsdiv-gate-clock" - gate clock with OMAP36xx specific hardware handling,
27 required for a hardware errata
|