| /f-stack/freebsd/arm/arm/ |
| H A D | pl310.c | 129 const char *ena = "enabled"; in pl310_print_config() local
135 (aux & AUX_CTRL_EARLY_BRESP) ? ena : dis); in pl310_print_config()
137 (aux & AUX_CTRL_INSTR_PREFETCH) ? ena : dis); in pl310_print_config()
139 (aux & AUX_CTRL_DATA_PREFETCH) ? ena : dis); in pl310_print_config()
141 (aux & AUX_CTRL_NS_INT_CTRL) ? ena : dis); in pl310_print_config()
143 (aux & AUX_CTRL_NS_LOCKDOWN) ? ena : dis); in pl310_print_config()
145 (aux & AUX_CTRL_SHARE_OVERRIDE) ? ena : dis); in pl310_print_config()
148 (prefetch & PREFETCH_CTRL_DL) ? ena : dis); in pl310_print_config()
154 (prefetch & PREFETCH_CTRL_DL_ON_WRAP) ? ena : dis); in pl310_print_config()
158 (prefetch & PREFETCH_CTRL_INCR_DL) ? ena : dis); in pl310_print_config()
[all …]
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| /f-stack/freebsd/contrib/openzfs/module/zfs/ |
| H A D | fm.c | 1484 switch (ENA_FORMAT(ena)) { in fm_ena_increment()
1501 uint64_t ena = 0; in fm_ena_generate_cpu() local
1527 return (ena); in fm_ena_generate_cpu()
1533 uint64_t ena; in fm_ena_generate() local
1539 return (ena); in fm_ena_generate()
1547 switch (ENA_FORMAT(ena)) { in fm_ena_generation_get()
1566 return (ENA_FORMAT(ena)); in fm_ena_format_get()
1570 fm_ena_id_get(uint64_t ena) in fm_ena_id_get() argument
1574 switch (ENA_FORMAT(ena)) { in fm_ena_id_get()
1589 fm_ena_time_get(uint64_t ena) in fm_ena_time_get() argument
[all …]
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| /f-stack/dpdk/drivers/event/octeontx2/ |
| H A D | otx2_evdev_adptr.c | 37 aq->cq.ena = 0; in sso_rxq_enable()
41 aq->cq_mask.ena = ~(aq->cq_mask.ena); in sso_rxq_enable()
94 aq->rq.ena = 0; /* Don't enable RQ yet */ in sso_rxq_enable()
111 aq->rq_mask.ena = ~(aq->rq_mask.ena); in sso_rxq_enable()
138 aq->cq.ena = 1; in sso_rxq_disable()
142 aq->cq_mask.ena = ~(aq->cq_mask.ena); in sso_rxq_disable()
167 aq->rq.ena = 1; in sso_rxq_disable()
184 aq->rq_mask.ena = ~(aq->rq_mask.ena); in sso_rxq_disable()
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| /f-stack/dpdk/drivers/net/thunderx/base/ |
| H A D | nicvf_hw_defs.h | 1023 uint64_t ena:1; member
1027 uint64_t ena:1;
1037 uint64_t ena:1; member
1053 uint64_t ena:1;
1064 uint64_t ena:1; member
1080 uint64_t ena:1;
1091 uint64_t ena:1; member
1109 uint64_t ena: 1;
1119 uint64_t ena:1; member
1139 uint64_t ena:1;
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| H A D | nicvf_hw.c | 226 pf_qs_cfg.ena = enable ? 1 : 0; in nicvf_qset_config_internal()
446 rbdr_cfg.ena = 1; in nicvf_qset_rbdr_config()
529 if (sq_cfg.ena && nicvf_qset_poll_reg(nic, qidx, NIC_QSET_SQ_0_7_STATUS, in nicvf_qset_sq_reclaim()
562 sq_cfg.ena = 1; in nicvf_qset_sq_config()
625 rq_cfg.ena = 1; in nicvf_qset_rq_config()
666 cq_cfg.ena = 1; in nicvf_qset_cq_config()
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| /f-stack/dpdk/drivers/mempool/octeontx2/ |
| H A D | otx2_mempool_ops.c | 455 pool_req->pool.ena = 0; in npa_lf_aura_pool_fini()
456 pool_req->pool_mask.ena = ~pool_req->pool_mask.ena; in npa_lf_aura_pool_fini()
462 aura_req->aura.ena = 0; in npa_lf_aura_pool_fini()
463 aura_req->aura_mask.ena = ~aura_req->aura_mask.ena; in npa_lf_aura_pool_fini()
613 aura->ena = 1; in npa_lf_aura_pool_pair_alloc()
626 pool->ena = 1; in npa_lf_aura_pool_pair_alloc()
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| H A D | otx2_mempool_debug.c | 14 pool->ena, pool->nat_align, pool->stack_caching); in npa_lf_pool_dump()
53 aura->ena, aura->pool_caching, aura->pool_way_mask); in npa_lf_aura_dump()
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| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-pcm-defs.h | 156 …uint64_t ena : 1; /**< If 0, Clock receiving logic is doing nothing … member
159 uint64_t ena : 1;
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| /f-stack/dpdk/drivers/common/octeontx2/hw/ |
| H A D | otx2_npa.h | 197 uint64_t ena : 1; member
247 uint64_t ena : 1; member
302 uint32_t ena : 1; member
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| H A D | otx2_nix.h | 690 uint64_t ena : 1; member
728 uint64_t ena : 1; member
773 uint32_t ena : 1; member
778 uint64_t ena : 1; member
850 uint64_t ena : 1; member
1193 uint64_t ena : 1; member
1256 uint64_t ena : 1; member
1361 uint64_t ena :1; member
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| /f-stack/dpdk/drivers/regex/octeontx2/ |
| H A D | otx2_regexdev_hw_access.h | 67 uint64_t ena : 1; member
84 uint64_t ena : 1; member
|
| H A D | otx2_regexdev_hw_access.c | 137 lf_ena.s.ena = 1; in otx2_ree_iq_enable()
150 lf_ena.s.ena = 0x0; in otx2_ree_iq_disable()
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| /f-stack/freebsd/contrib/device-tree/Bindings/regulator/ |
| H A D | max77686.txt | 37 - maxim,ena-gpios : one GPIO specifier enable control (the gpio
69 maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
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| /f-stack/freebsd/net/ |
| H A D | if_vlan.c | 1704 int cap = 0, ena = 0, mena; in vlan_capabilities() local
1727 if (ena & IFCAP_TXCSUM) in vlan_capabilities()
1730 if (ena & IFCAP_TXCSUM_IPV6) in vlan_capabilities()
1746 ena |= mena & IFCAP_TSO; in vlan_capabilities()
1747 if (ena & IFCAP_TSO) in vlan_capabilities()
1759 ena |= p->if_capenable & IFCAP_LRO; in vlan_capabilities()
1774 ena |= mena & IFCAP_TOE; in vlan_capabilities()
1782 ena |= (mena & IFCAP_LINKSTATE); in vlan_capabilities()
1790 ena |= (mena & IFCAP_TXRTLMT); in vlan_capabilities()
1801 ena |= (mena & IFCAP_NOMAP); in vlan_capabilities()
[all …]
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| H A D | if_lagg.c | 669 int cap, ena, pena; in lagg_capabilities() local
676 ena = ~0; in lagg_capabilities()
678 ena &= lp->lp_ifp->if_capenable; in lagg_capabilities()
679 ena = (ena == ~0 ? 0 : ena); in lagg_capabilities()
686 pena = ena; in lagg_capabilities()
688 lagg_setcaps(lp, ena); in lagg_capabilities()
689 ena &= lp->lp_ifp->if_capenable; in lagg_capabilities()
691 } while (pena != ena); in lagg_capabilities()
706 sc->sc_ifp->if_capenable != ena || in lagg_capabilities()
710 sc->sc_ifp->if_capenable = ena; in lagg_capabilities()
[all …]
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| /f-stack/freebsd/contrib/openzfs/include/sys/fm/ |
| H A D | protocol.h | 151 #define ENA_FORMAT(ena) ((ena) & ENA_FORMAT_MASK) argument
|
| /f-stack/dpdk/doc/guides/nics/ |
| H A D | index.rst | 26 ena
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| /f-stack/dpdk/doc/guides/nics/features/ |
| H A D | ena.ini | 2 ; Supported features of the 'ena' network poll mode driver.
|
| /f-stack/dpdk/drivers/crypto/octeontx2/ |
| H A D | otx2_cryptodev_hw_access.c | 174 lf_ctl.s.ena = 1; in otx2_cpt_iq_enable()
201 ctl.s.ena = 0; in otx2_cpt_iq_disable()
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| /f-stack/dpdk/drivers/net/ |
| H A D | meson.build | 19 'ena',
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| /f-stack/freebsd/arm/nvidia/tegra124/ |
| H A D | tegra124_pmc.c | 186 enum tegra_powergate_id id, int ena) in tegra124_pmc_set_powergate() argument
194 if (((reg != 0) && ena) || ((reg == 0) && !ena)) { in tegra124_pmc_set_powergate()
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| /f-stack/dpdk/drivers/common/cpt/ |
| H A D | cpt_hw_types.h | 324 uint64_t ena : 1; member
326 uint64_t ena : 1;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/scsi/ |
| H A D | hisilicon-sas.txt | 18 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
72 ctrl-clock-ena-reg = <0x338>;
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| /f-stack/freebsd/arm64/nvidia/tegra210/ |
| H A D | tegra210_pmc.c | 223 enum tegra_powergate_id id, int ena) in tegra210_pmc_set_powergate() argument
231 if (((reg != 0) && ena) || ((reg == 0) && !ena)) { in tegra210_pmc_set_powergate()
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| /f-stack/dpdk/drivers/net/octeontx2/ |
| H A D | otx2_ethdev.c | 312 aq->cq.ena = 1; in nix_cq_rq_init()
377 aq->rq.ena = 1; in nix_cq_rq_init()
443 aq->rq.ena = enb; in nix_rq_enb_dis()
444 aq->rq_mask.ena = ~(aq->rq_mask.ena); in nix_rq_enb_dis()
464 aq->cq.ena = 0; in nix_cq_rq_uninit()
465 aq->cq_mask.ena = ~(aq->cq_mask.ena); in nix_cq_rq_uninit()
940 sq->sq.ena = 1; in nix_sq_init()
993 if (!rsp->sq.ena) in nix_sq_uninit()
1002 aq->sq_mask.ena = ~aq->sq_mask.ena; in nix_sq_uninit()
1003 aq->sq.ena = 0; in nix_sq_uninit()
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