| /f-stack/freebsd/contrib/device-tree/Bindings/edac/ |
| H A D | socfpga-eccmgr.txt | 38 l2-ecc@ffd08140 {
44 ocram-ecc@ffd08144 {
147 l2-ecc@ffd06010 {
154 ocram-ecc@ff8c3000 {
201 dma-ecc@ff8c8000 {
208 usb0-ecc@ff8c8800 {
216 qspi-ecc@ff8c8400 {
224 sdmmc-ecc@ff8c2c00 {
321 ocram-ecc@ff8cc000 {
363 dma-ecc@ff8c9000 {
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/mtd/ |
| H A D | mtk-nand.txt | 36 ecc-engine = <&bch>;
49 - nand-ecc-mode: the NAND ecc mode (check driver for supported modes)
65 E : nand-ecc-strength.
71 Q : nand-ecc-step-size.
127 nand-ecc-mode = "hw";
128 nand-ecc-strength = <24>;
129 nand-ecc-step-size = <1024>;
160 "mediatek,mt2701-ecc",
161 "mediatek,mt2712-ecc",
162 "mediatek,mt7622-ecc".
[all …]
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| H A D | hisi504-nand.txt | 11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
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| H A D | denali,nand.yaml | 40 ecc: ECC circuit clock
44 - const: ecc
79 nand-ecc-strength:
83 nand-ecc-step-size:
97 nand-ecc-strength:
102 nand-ecc-step-size:
116 nand-ecc-strength:
120 nand-ecc-step-size:
138 clock-names = "nand", "nand_x", "ecc";
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| H A D | gpmc-nand.txt | 28 "sw" 1-bit Hamming ecc code via software
31 "ham1" 1-bit Hamming ecc code
32 "bch4" 4-bit BCH ecc code
33 "bch8" 8-bit BCH ecc code
79 ti,nand-ecc-opt = "bch8";
131 '3' for HAM1_xx ecc schemes
132 '7' for BCH4_xx ecc schemes
133 '14' for BCH8_xx ecc schemes
134 '26' for BCH16_xx ecc schemes
137 trying to use BCH16 (ECC_BYTES=26) ecc-scheme.
[all …]
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| H A D | nvidia-tegra20-nand.txt | 25 - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
27 - nand-ecc-algo: string, algorithm of NAND ECC.
31 - nand-ecc-strength: integer representing the number of bits to correct
36 - nand-ecc-maximize: See nand-controller.yaml
60 nand-ecc-algo = "bch";
61 nand-ecc-strength = <8>;
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| H A D | tango-nand.txt | 29 nand-ecc-strength = <14>;
30 nand-ecc-step-size = <1024>;
35 nand-ecc-strength = <14>;
36 nand-ecc-step-size = <1024>;
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| H A D | vf610-nfc.txt | 29 - nand-ecc-mode: see nand-controller.yaml
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
33 - nand-ecc-step-size: step size equals page size, currently only 2k pages are
54 nand-ecc-mode = "hw";
55 nand-ecc-strength = <32>;
56 nand-ecc-step-size = <2048>;
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| H A D | davinci-nand.txt | 42 - nand-ecc-mode: operation mode of the NAND ecc mode. ECC mode
48 - ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
58 - ti,davinci-ecc-mode: operation mode of the NAND ecc mode. ECC mode
86 nand-ecc-mode = "hw";
87 ti,davinci-ecc-bits = <4>;
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| H A D | allwinner,sun4i-a10-nand.yaml | 64 nand-ecc-mode: true
66 nand-ecc-algo:
69 nand-ecc-step-size:
72 nand-ecc-strength:
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| H A D | st,stm32-fmc2-nand.yaml | 29 - description: ecc DMA channel
35 - const: ecc
41 nand-ecc-step-size:
44 nand-ecc-strength:
115 dma-names = "tx", "rx", "ecc";
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| H A D | ingenic,nand.yaml | 30 ecc-engine: true
78 ecc-engine = <&bch>;
92 nand-ecc-step-size = <1024>;
93 nand-ecc-strength = <24>;
94 nand-ecc-mode = "hw";
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| H A D | nand-controller.yaml | 49 nand-ecc-mode:
54 and should be replaced by soft and nand-ecc-algo.
58 nand-ecc-algo:
82 nand-ecc-strength:
88 nand-ecc-step-size:
94 nand-ecc-maximize:
141 nand-ecc-mode = "soft";
142 nand-ecc-algo = "bch";
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| H A D | marvell-nand.txt | 47 - nand-ecc-mode: see nand-controller.yaml. Will use hardware ECC if not specified.
48 - nand-ecc-algo: see nand-controller.yaml. This property is essentially useful when
52 the NAND chip. This value may be overwritten with nand-ecc-strength
54 - nand-ecc-strength: see nand-controller.yaml.
55 - nand-ecc-step-size: see nand-controller.yaml. Marvell's NAND flash controller does
78 nand-ecc-mode = "hw";
81 nand-ecc-strength = <4>;
82 nand-ecc-step-size = <512>;
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| /f-stack/freebsd/contrib/device-tree/src/arm64/intel/ |
| H A D | socfpga_agilex.dtsi | 562 ocram-ecc@ff8cc000 {
566 altr,ecc-parent = <&ocram>;
570 usb0-ecc@ff8c4000 {
572 "altr,socfpga-usb-ecc";
574 altr,ecc-parent = <&usb0>;
578 emac0-rx-ecc@ff8c0000 {
582 altr,ecc-parent = <&gmac0>;
586 emac0-tx-ecc@ff8c0400 {
590 altr,ecc-parent = <&gmac0>;
594 sdmmca-ecc@ff8c8c00 {
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/altera/ |
| H A D | socfpga_stratix10.dtsi | 485 reset-names = "dwc2", "dwc2-ecc";
498 reset-names = "dwc2", "dwc2-ecc";
562 ocram-ecc@ff8cc000 {
566 altr,ecc-parent = <&ocram>;
570 usb0-ecc@ff8c4000 {
572 "altr,socfpga-usb-ecc";
574 altr,ecc-parent = <&usb0>;
578 emac0-rx-ecc@ff8c0000 {
582 altr,ecc-parent = <&gmac0>;
586 emac0-tx-ecc@ff8c0400 {
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | bcm5301x-nand-cs0-bch4.dtsi | 9 nand-ecc-algo = "bch";
10 nand-ecc-strength = <4>;
11 nand-ecc-step-size = <512>;
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| H A D | bcm5301x-nand-cs0-bch1.dtsi | 11 nand-ecc-algo = "bch";
12 nand-ecc-strength = <1>;
13 nand-ecc-step-size = <512>;
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| H A D | socfpga_arria10_socdk_sdmmc.dts | 18 sdmmca-ecc@ff8c2c00 {
19 compatible = "altr,socfpga-sdmmc-ecc";
21 altr,ecc-parent = <&mmc>;
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| H A D | bcm5301x-nand-cs0-bch8.dtsi | 14 nand-ecc-algo = "bch";
15 nand-ecc-strength = <8>;
16 nand-ecc-step-size = <512>;
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| H A D | at91-linea.dtsi | 65 nand-ecc-mode = "hw";
66 nand-ecc-strength = <4>;
67 nand-ecc-step-size = <512>;
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| H A D | sun8i-r16-nintendo-nes-classic.dts | 39 nand-ecc-mode = "hw";
40 nand-ecc-strength = <16>;
41 nand-ecc-step-size = <1024>;
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| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-dfa.h | 199 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
207 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
219 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
228 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
250 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
259 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
271 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
281 uint64_t ecc : 7;/**< ECC checksum on the rest of the bits */ member
597 next_ptr.lg.w32.ecc = cvmx_llm_ecc(next_ptr.u64); in cvmx_dfa_write_node_lg()
603 next_ptr.lg.w36.ecc = cvmx_llm_ecc(next_ptr.u64); in cvmx_dfa_write_node_lg()
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| /f-stack/freebsd/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm97xxx-nand-cs1-bch4.dtsi | 8 nand-ecc-strength = <4>;
9 nand-ecc-step-size = <512>;
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| H A D | bcm97xxx-nand-cs1-bch24.dtsi | 8 nand-ecc-strength = <24>;
9 nand-ecc-step-size = <1024>;
|