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/f-stack/freebsd/contrib/device-tree/Bindings/clock/ti/
H A Ddivider.txt30 Additionally an array of valid dividers may be supplied like so:
32 ti,dividers = <4>, <8>, <0>, <16>;
45 unless the divider array is provided, min and max dividers. Optionally
63 - ti,dividers : array of integers defining divisors
68 if ti,dividers is not defined.
70 only valid if ti,dividers is not defined.
72 only valid if ti,dividers is not defined.
116 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dbaikal,bt1-ccu-div.yaml19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
26 3) AXI-bus clock dividers (AXI) - described in this binding file.
27 4) System devices reference clock dividers (SYS) - described in this binding
51 then passed over CCU dividers to create signals required for the target clock
52 domain (like AXI-bus or System Device consumers). The dividers have the
71 peculiarities the dividers may lack of some functionality depicted on the
76 The clock dividers, which output clock is then consumed by the SoC individual
78 Similarly the dividers with output clocks utilized as AXI-bus reference clocks
H A Ddove-divider-clock.txt3 Marvell Dove has a 2GHz PLL, which feeds into a set of dividers to provide
4 high speed clocks for a number of peripherals. These dividers are part of
H A Dbaikal,bt1-ccu-pll.yaml19 by means of PLLs and gateable/non-gateable dividers embedded into the CCU.
24 3) AXI-bus clock dividers (AXI).
25 4) System devices reference clock dividers (SYS).
73 the binding supports the PLL dividers configuration in accordance with a
H A Dbrcm,bcm2835-cprman.txt8 oscillator, a level of PLL dividers that produce channels off of the
12 the PLL dividers directly.
H A Drenesas,r8a73a4-cpg-clocks.txt4 and several fixed ratio dividers.
H A Drenesas,sh73a0-cpg-clocks.txt6 and several fixed ratio dividers.
H A Drenesas,r8a7740-cpg-clocks.txt6 and several fixed ratio and variable ratio dividers.
H A Dartpec6.txt25 dividers ("frac_clk0" and "frac_clk1").
H A Drenesas,r8a7778-cpg-clocks.txt4 several fixed ratio dividers.
H A Drenesas,r8a7779-cpg-clocks.txt4 several fixed ratio dividers.
H A Drenesas,rz-cpg-clocks.txt4 CPU and GPU clocks, and several fixed ratio dividers.
H A Dingenic,cgu.yaml11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
/f-stack/freebsd/arm64/qoriq/clk/
H A Dqoriq_clk_pll.c138 while (clkdef->dividers[i] != 0) { in qoriq_clk_pll_register()
139 def.div = clkdef->dividers[i]; in qoriq_clk_pll_register()
142 parent_name, clkdef->dividers[i]); in qoriq_clk_pll_register()
H A Dls1046a_clkgen.c62 .dividers = ls1046a_pltfrm_pll_divs,
79 .dividers = ls1046a_cga1_pll_divs,
92 .dividers = ls1046a_cga1_pll_divs,
H A Dqoriq_clk_pll.h45 const uint8_t *dividers; member
H A Dlx2160a_clkgen.c59 .dividers = d, \
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Domap446x-clocks.dtsi14 ti,dividers = <8>, <16>, <32>;
H A Domap2420-clocks.dtsi79 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>, <0>, <0>, <0>, <12>;
262 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>, <0>, <0>, <0>, <12>;
266 ti,dividers = <0>, <1>, <2>, <3>, <4>, <0>, <6>, <0>, <8>;
H A Dpxa25x.dtsi14 * The muxing of external clocks/internal dividers for osc* clock
H A Domap44xx-clocks.dtsi459 ti,dividers = <2>, <1>;
530 ti,dividers = <14>, <18>;
730 ti,dividers = <4>, <8>;
746 ti,dividers = <2>, <4>;
754 ti,dividers = <2>, <4>;
762 ti,dividers = <1>, <8>;
/f-stack/freebsd/contrib/device-tree/Bindings/clock/st/
H A Dst,flexgen.txt6 - a pre and final dividers (represented by a divider and gate elements)
/f-stack/freebsd/contrib/device-tree/Bindings/serial/
H A Dmvebu-uart.txt11 accesses to the FIFO, baudrate unlimited by the dividers).
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dmt2701-afe-pcm.txt47 - assigned-clocks: list of input clocks and dividers for the audio system.
/f-stack/freebsd/contrib/device-tree/Bindings/clock/ti/davinci/
H A Dpll.txt4 to the PLL itself, this controller also contains bypasses, gates, dividers,

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