Searched refs:div_lg (Results 1 – 3 of 3) sorted by relevance
142 reg = (reg + 1) << sc->clk_descr->clk_div.div_lg; in jz4780_clk_gen_recalc_freq()168 div_reg = divider >> sc->clk_descr->clk_div.div_lg; in jz4780_clk_gen_set_freq()169 divider = div_reg << sc->clk_descr->clk_div.div_lg; in jz4780_clk_gen_set_freq()191 divider = (div_reg << sc->clk_descr->clk_div.div_lg); in jz4780_clk_gen_set_freq()
60 uint16_t div_lg: 5; member
114 .clk_div.div_lg = (lg), \