| /f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | ath79-ddr-controller.txt | 10 - compatible: has to be "qca,<soc-type>-ddr-controller",
11 "qca,[ar7100|ar7240]-ddr-controller" as fallback.
12 On SoC with PCI support "qca,ar7100-ddr-controller" should be used as
13 fallback, otherwise "qca,ar7240-ddr-controller" should be used.
15 - #qca,ddr-wb-channel-cells: Specifies the number of cells needed to encode
21 compatible = "qca,ar9132-ddr-controller",
22 "qca,ar7240-ddr-controller";
25 #qca,ddr-wb-channel-cells = <1>;
32 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
33 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
|
| H A D | calxeda-ddr-ctrlr.yaml | 4 $id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#
20 - calxeda,hb-ddr-ctrl
21 - calxeda,ecx-2000-ddr-ctrl
39 compatible = "calxeda,hb-ddr-ctrl";
|
| H A D | ti-da8xx-ddrctl.txt | 11 - compatible: "ti,da850-ddr-controller" - for da850 SoC based boards
18 compatible = "ti,da850-ddr-controller";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 169 "brcm,brcmstb-ddr-phy-v71.1"
170 "brcm,brcmstb-ddr-phy-v72.0"
171 "brcm,brcmstb-ddr-phy-v225.1"
172 "brcm,brcmstb-ddr-phy-v240.1"
197 "brcm,brcmstb-memc-ddr"
210 ddr-phy@f1106000 {
220 memc-ddr@f1102000 {
230 ddr-phy@f1186000 {
240 memc-ddr@f1182000 {
250 ddr-phy@f1206000 {
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | qca,ath79-cpu-intc.txt | 5 qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties.
20 - qca,ddr-wb-channel-interrupts: List of the interrupts needing a write
22 - qca,ddr-wb-channels: List of phandles to the write buffer channels for
23 each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt
34 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
35 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
43 #qca,ddr-wb-channel-cells = <1>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/perf/ |
| H A D | fsl-imx-ddr.txt | 6 "fsl,imx8-ddr-pmu"
7 "fsl,imx8m-ddr-pmu"
8 "fsl,imx8mp-ddr-pmu"
17 ddr-pmu@5c020000 {
18 compatible = "fsl,imx8-ddr-pmu";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/mips/brcm/ |
| H A D | soc.txt | 75 memc-ddr@2000 {
79 ddr-phy@6000 {
92 "brcm,brcmstb-ddr-phy-v64.5"
93 "brcm,brcmstb-ddr-phy"
99 ddr-phy@6000 {
110 "brcm,bcm7425-memc-ddr"
111 "brcm,bcm7429-memc-ddr"
112 "brcm,bcm7435-memc-ddr" and
113 "brcm,brcmstb-memc-ddr"
119 memc-ddr@2000 {
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | bcm7445.dtsi | 239 memc-ddr@2000 {
240 compatible = "brcm,brcmstb-memc-ddr";
244 ddr-phy@6000 {
245 compatible = "brcm,brcmstb-ddr-phy-v240.1";
261 memc-ddr@2000 {
262 compatible = "brcm,brcmstb-memc-ddr";
266 ddr-phy@6000 {
267 compatible = "brcm,brcmstb-ddr-phy-v240.1";
283 memc-ddr@2000 {
284 compatible = "brcm,brcmstb-memc-ddr";
[all …]
|
| H A D | exynos5260-xyref5260.dts | 73 samsung,dw-mshc-ddr-timing = <0 2>;
85 samsung,dw-mshc-ddr-timing = <1 2>;
|
| H A D | exynos5410-smdk5410.dts | 46 samsung,dw-mshc-ddr-timing = <1 2>;
56 samsung,dw-mshc-ddr-timing = <1 2>;
|
| H A D | rk3288-tinker-s.dts | 23 mmc-ddr-1_8v;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | amlogic,meson8-ddr-clkc.yaml | 4 $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#
15 - amlogic,meson8-ddr-clkc
16 - amlogic,meson8b-ddr-clkc
43 compatible = "amlogic,meson8-ddr-clkc";
|
| H A D | qca,ath79-pll.txt | 20 - clock-output-names: should be "cpu", "ddr", "ahb"
32 clock-output-names = "cpu", "ddr", "ahb";
|
| /f-stack/freebsd/contrib/device-tree/src/mips/qca/ |
| H A D | ar9132.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
52 compatible = "qca,ar9132-ddr-controller",
53 "qca,ar7240-ddr-controller";
56 #qca,ddr-wb-channel-cells = <1>;
98 clock-output-names = "cpu", "ddr", "ahb";
|
| H A D | ar9331.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>;
29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
56 compatible = "qca,ar7240-ddr-controller";
59 #qca,ddr-wb-channel-cells = <1>;
|
| /f-stack/freebsd/contrib/device-tree/Bindings/mmc/ |
| H A D | sdhci-msm.txt | 50 - qcom,ddr-config: Certain chipsets and platforms require particular settings
64 1. Data path : sdhc to ddr
67 is "sdhc-ddr" and for config interconnect path it is
91 interconnect-names = "sdhc-ddr","cpu-sdhc";
94 qcom,ddr-config = <0x80040868>;
114 qcom,ddr-config = <0x80040868>;
|
| H A D | exynos-dw-mshc.txt | 35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
42 Notes for the sdr-timing and ddr-timing values:
88 samsung,dw-mshc-ddr-timing = <1 2>;
|
| /f-stack/freebsd/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm7435.dtsi | 559 memc-ddr@2000 {
560 compatible = "brcm,brcmstb-memc-ddr";
564 ddr-phy@6000 {
565 compatible = "brcm,brcmstb-ddr-phy";
570 compatible = "brcm,brcmstb-ddr-shimphy";
586 memc-ddr@2000 {
587 compatible = "brcm,brcmstb-memc-ddr";
591 ddr-phy@6000 {
592 compatible = "brcm,brcmstb-ddr-phy";
597 compatible = "brcm,brcmstb-ddr-shimphy";
|
| H A D | bcm7425.dtsi | 544 memc-ddr@2000 {
545 compatible = "brcm,brcmstb-memc-ddr";
549 ddr-phy@6000 {
550 compatible = "brcm,brcmstb-ddr-phy";
555 compatible = "brcm,brcmstb-ddr-shimphy";
571 memc-ddr@2000 {
572 compatible = "brcm,brcmstb-memc-ddr";
576 ddr-phy@6000 {
577 compatible = "brcm,brcmstb-ddr-phy";
582 compatible = "brcm,brcmstb-ddr-shimphy";
|
| H A D | bcm7362.dtsi | 448 memc-ddr@2000 {
449 compatible = "brcm,brcmstb-memc-ddr";
453 ddr-phy@6000 {
454 compatible = "brcm,brcmstb-ddr-phy";
459 compatible = "brcm,brcmstb-ddr-shimphy";
|
| H A D | bcm7360.dtsi | 452 memc-ddr@2000 {
453 compatible = "brcm,brcmstb-memc-ddr";
457 ddr-phy@6000 {
458 compatible = "brcm,brcmstb-ddr-phy";
463 compatible = "brcm,brcmstb-ddr-shimphy";
|
| H A D | bcm7346.dtsi | 533 memc-ddr@2000 {
534 compatible = "brcm,brcmstb-memc-ddr";
538 ddr-phy@6000 {
539 compatible = "brcm,brcmstb-ddr-phy";
544 compatible = "brcm,brcmstb-ddr-shimphy";
|
| /f-stack/freebsd/contrib/device-tree/Bindings/mfd/ |
| H A D | bd9571mwv.txt | 28 - rohm,ddr-backup-power : Value to use for DDR-Backup Power (default 0).
57 rohm,ddr-backup-power = <0xf>;
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h5-libretech-all-h3-cc.dts | 16 mmc-ddr-3_3v;
|
| /f-stack/freebsd/contrib/device-tree/src/arm64/broadcom/northstar2/ |
| H A D | ns2-clock.dtsi | 43 compatible = "brcm,ns2-lcpll-ddr";
49 "ddr", "ddr_ch2_unused",
|