Searched refs:d4clk0 (Results 1 – 2 of 2) sorted by relevance
477 if (stat.s.d4clk0 && stat.s.d4clk1 && clock_transitions) in cvmx_spi_clock_detect_cb()483 stat.s.d4clk0 = 0; in cvmx_spi_clock_detect_cb()491 } while (stat.s.d4clk0 == 0 || stat.s.d4clk1 == 0); in cvmx_spi_clock_detect_cb()
437 uint64_t d4clk0 : 1; /**< Saw '0' on Spi4 receive data forward clk input */ member441 uint64_t d4clk0 : 1;