| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-pexp-defs.h | 69 cvmx_warn("CVMX_PEXP_NPEI_BIST_STATUS not supported on this chip\n"); in CVMX_PEXP_NPEI_BIST_STATUS_FUNC()
91 cvmx_warn("CVMX_PEXP_NPEI_CTL_PORT0 not supported on this chip\n"); in CVMX_PEXP_NPEI_CTL_PORT0_FUNC()
102 cvmx_warn("CVMX_PEXP_NPEI_CTL_PORT1 not supported on this chip\n"); in CVMX_PEXP_NPEI_CTL_PORT1_FUNC()
113 cvmx_warn("CVMX_PEXP_NPEI_CTL_STATUS not supported on this chip\n"); in CVMX_PEXP_NPEI_CTL_STATUS_FUNC()
146 cvmx_warn("CVMX_PEXP_NPEI_DBG_DATA not supported on this chip\n"); in CVMX_PEXP_NPEI_DBG_DATA_FUNC()
238 cvmx_warn("CVMX_PEXP_NPEI_DMA_CNTS not supported on this chip\n"); in CVMX_PEXP_NPEI_DMA_CNTS_FUNC()
331 cvmx_warn("CVMX_PEXP_NPEI_INT_ENB not supported on this chip\n"); in CVMX_PEXP_NPEI_INT_ENB_FUNC()
342 cvmx_warn("CVMX_PEXP_NPEI_INT_ENB2 not supported on this chip\n"); in CVMX_PEXP_NPEI_INT_ENB2_FUNC()
364 cvmx_warn("CVMX_PEXP_NPEI_INT_SUM not supported on this chip\n"); in CVMX_PEXP_NPEI_INT_SUM_FUNC()
1112 cvmx_warn("CVMX_PEXP_NPEI_STATE1 not supported on this chip\n"); in CVMX_PEXP_NPEI_STATE1_FUNC()
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| H A D | cvmx-endor-defs.h | 71 cvmx_warn("CVMX_ENDOR_ADMA_AXIERR_INTR not supported on this chip\n"); in CVMX_ENDOR_ADMA_AXIERR_INTR_FUNC()
93 cvmx_warn("CVMX_ENDOR_ADMA_AXI_SIGNAL not supported on this chip\n"); in CVMX_ENDOR_ADMA_AXI_SIGNAL_FUNC()
170 cvmx_warn("CVMX_ENDOR_ADMA_DMA_RESET not supported on this chip\n"); in CVMX_ENDOR_ADMA_DMA_RESET_FUNC()
181 cvmx_warn("CVMX_ENDOR_ADMA_INTR_DIS not supported on this chip\n"); in CVMX_ENDOR_ADMA_INTR_DIS_FUNC()
192 cvmx_warn("CVMX_ENDOR_ADMA_INTR_ENB not supported on this chip\n"); in CVMX_ENDOR_ADMA_INTR_ENB_FUNC()
456 cvmx_warn("CVMX_ENDOR_INTC_RD_RINT not supported on this chip\n"); in CVMX_ENDOR_INTC_RD_RINT_FUNC()
511 cvmx_warn("CVMX_ENDOR_INTC_SWCLR not supported on this chip\n"); in CVMX_ENDOR_INTC_SWCLR_FUNC()
522 cvmx_warn("CVMX_ENDOR_INTC_SWSET not supported on this chip\n"); in CVMX_ENDOR_INTC_SWSET_FUNC()
1050 cvmx_warn("CVMX_ENDOR_RFIF_CONF not supported on this chip\n"); in CVMX_ENDOR_RFIF_CONF_FUNC()
1061 cvmx_warn("CVMX_ENDOR_RFIF_CONF2 not supported on this chip\n"); in CVMX_ENDOR_RFIF_CONF2_FUNC()
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| H A D | cvmx-warn.h | 61 #ifndef cvmx_warn
63 extern void cvmx_warn(const char *format, ...);
65 extern void cvmx_warn(const char *format, ...) __attribute__ ((format(printf, 1, 2)));
69 #define cvmx_warn_if(expression, format, ...) if (expression) cvmx_warn(format, ##__VA_ARGS__)
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| H A D | cvmx-sso-defs.h | 71 cvmx_warn("CVMX_SSO_BIST_STAT not supported on this chip\n"); in CVMX_SSO_BIST_STAT_FUNC()
82 cvmx_warn("CVMX_SSO_CFG not supported on this chip\n"); in CVMX_SSO_CFG_FUNC()
93 cvmx_warn("CVMX_SSO_DS_PC not supported on this chip\n"); in CVMX_SSO_DS_PC_FUNC()
104 cvmx_warn("CVMX_SSO_ERR not supported on this chip\n"); in CVMX_SSO_ERR_FUNC()
115 cvmx_warn("CVMX_SSO_ERR_ENB not supported on this chip\n"); in CVMX_SSO_ERR_ENB_FUNC()
159 cvmx_warn("CVMX_SSO_GWE_CFG not supported on this chip\n"); in CVMX_SSO_GWE_CFG_FUNC()
214 cvmx_warn("CVMX_SSO_IQ_INT not supported on this chip\n"); in CVMX_SSO_IQ_INT_FUNC()
258 cvmx_warn("CVMX_SSO_NW_TIM not supported on this chip\n"); in CVMX_SSO_NW_TIM_FUNC()
368 cvmx_warn("CVMX_SSO_QOS_WE not supported on this chip\n"); in CVMX_SSO_QOS_WE_FUNC()
379 cvmx_warn("CVMX_SSO_RESET not supported on this chip\n"); in CVMX_SSO_RESET_FUNC()
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| H A D | cvmx-led-defs.h | 60 cvmx_warn("CVMX_LED_BLINK not supported on this chip\n"); in CVMX_LED_BLINK_FUNC()
71 cvmx_warn("CVMX_LED_CLK_PHASE not supported on this chip\n"); in CVMX_LED_CLK_PHASE_FUNC()
82 cvmx_warn("CVMX_LED_CYLON not supported on this chip\n"); in CVMX_LED_CYLON_FUNC()
93 cvmx_warn("CVMX_LED_DBG not supported on this chip\n"); in CVMX_LED_DBG_FUNC()
104 cvmx_warn("CVMX_LED_EN not supported on this chip\n"); in CVMX_LED_EN_FUNC()
115 cvmx_warn("CVMX_LED_POLARITY not supported on this chip\n"); in CVMX_LED_POLARITY_FUNC()
126 cvmx_warn("CVMX_LED_PRT not supported on this chip\n"); in CVMX_LED_PRT_FUNC()
137 cvmx_warn("CVMX_LED_PRT_FMT not supported on this chip\n"); in CVMX_LED_PRT_FMT_FUNC()
150 cvmx_warn("CVMX_LED_PRT_STATUSX(%lu) is invalid on this chip\n", offset); in CVMX_LED_PRT_STATUSX()
163 cvmx_warn("CVMX_LED_UDD_CNTX(%lu) is invalid on this chip\n", offset); in CVMX_LED_UDD_CNTX()
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| H A D | cvmx-eoi-defs.h | 60 cvmx_warn("CVMX_EOI_BIST_CTL_STA not supported on this chip\n"); in CVMX_EOI_BIST_CTL_STA_FUNC()
71 cvmx_warn("CVMX_EOI_CTL_STA not supported on this chip\n"); in CVMX_EOI_CTL_STA_FUNC()
82 cvmx_warn("CVMX_EOI_DEF_STA0 not supported on this chip\n"); in CVMX_EOI_DEF_STA0_FUNC()
93 cvmx_warn("CVMX_EOI_DEF_STA1 not supported on this chip\n"); in CVMX_EOI_DEF_STA1_FUNC()
104 cvmx_warn("CVMX_EOI_DEF_STA2 not supported on this chip\n"); in CVMX_EOI_DEF_STA2_FUNC()
115 cvmx_warn("CVMX_EOI_ECC_CTL not supported on this chip\n"); in CVMX_EOI_ECC_CTL_FUNC()
148 cvmx_warn("CVMX_EOI_ENDOR_CTL not supported on this chip\n"); in CVMX_EOI_ENDOR_CTL_FUNC()
159 cvmx_warn("CVMX_EOI_INT_ENA not supported on this chip\n"); in CVMX_EOI_INT_ENA_FUNC()
170 cvmx_warn("CVMX_EOI_INT_STA not supported on this chip\n"); in CVMX_EOI_INT_STA_FUNC()
181 cvmx_warn("CVMX_EOI_IO_DRV not supported on this chip\n"); in CVMX_EOI_IO_DRV_FUNC()
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| H A D | cvmx-sriomaintx-defs.h | 61 cvmx_warn("CVMX_SRIOMAINTX_ASMBLY_ID(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_ASMBLY_ID()
73 cvmx_warn("CVMX_SRIOMAINTX_ASMBLY_INFO(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_ASMBLY_INFO()
97 cvmx_warn("CVMX_SRIOMAINTX_BELL_STATUS(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_BELL_STATUS()
109 cvmx_warn("CVMX_SRIOMAINTX_COMP_TAG(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_COMP_TAG()
133 cvmx_warn("CVMX_SRIOMAINTX_DEV_ID(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_DEV_ID()
145 cvmx_warn("CVMX_SRIOMAINTX_DEV_REV(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_DEV_REV()
157 cvmx_warn("CVMX_SRIOMAINTX_DST_OPS(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_DST_OPS()
229 cvmx_warn("CVMX_SRIOMAINTX_ERB_HDR(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_ERB_HDR()
541 cvmx_warn("CVMX_SRIOMAINTX_LCS_BA0(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_LCS_BA0()
553 cvmx_warn("CVMX_SRIOMAINTX_LCS_BA1(%lu) is invalid on this chip\n", block_id); in CVMX_SRIOMAINTX_LCS_BA1()
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| H A D | cvmx-tim-defs.h | 60 cvmx_warn("CVMX_TIM_BIST_RESULT not supported on this chip\n"); in CVMX_TIM_BIST_RESULT_FUNC()
71 cvmx_warn("CVMX_TIM_DBG2 not supported on this chip\n"); in CVMX_TIM_DBG2_FUNC()
82 cvmx_warn("CVMX_TIM_DBG3 not supported on this chip\n"); in CVMX_TIM_DBG3_FUNC()
93 cvmx_warn("CVMX_TIM_ECC_CFG not supported on this chip\n"); in CVMX_TIM_ECC_CFG_FUNC()
104 cvmx_warn("CVMX_TIM_FR_RN_TT not supported on this chip\n"); in CVMX_TIM_FR_RN_TT_FUNC()
115 cvmx_warn("CVMX_TIM_GPIO_EN not supported on this chip\n"); in CVMX_TIM_GPIO_EN_FUNC()
126 cvmx_warn("CVMX_TIM_INT0 not supported on this chip\n"); in CVMX_TIM_INT0_FUNC()
137 cvmx_warn("CVMX_TIM_INT0_EN not supported on this chip\n"); in CVMX_TIM_INT0_EN_FUNC()
148 cvmx_warn("CVMX_TIM_INT0_EVENT not supported on this chip\n"); in CVMX_TIM_INT0_EVENT_FUNC()
159 cvmx_warn("CVMX_TIM_INT_ECCERR not supported on this chip\n"); in CVMX_TIM_INT_ECCERR_FUNC()
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| H A D | cvmx-pcmx-defs.h | 64 cvmx_warn("CVMX_PCMX_DMA_CFG(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_DMA_CFG()
79 cvmx_warn("CVMX_PCMX_INT_ENA(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_INT_ENA()
94 cvmx_warn("CVMX_PCMX_INT_SUM(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_INT_SUM()
109 cvmx_warn("CVMX_PCMX_RXADDR(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXADDR()
124 cvmx_warn("CVMX_PCMX_RXCNT(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXCNT()
139 cvmx_warn("CVMX_PCMX_RXMSK0(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXMSK0()
154 cvmx_warn("CVMX_PCMX_RXMSK1(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXMSK1()
169 cvmx_warn("CVMX_PCMX_RXMSK2(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXMSK2()
184 cvmx_warn("CVMX_PCMX_RXMSK3(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXMSK3()
199 cvmx_warn("CVMX_PCMX_RXMSK4(%lu) is invalid on this chip\n", offset); in CVMX_PCMX_RXMSK4()
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| H A D | cvmx-stxx-defs.h | 61 cvmx_warn("CVMX_STXX_ARB_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_ARB_CTL()
73 cvmx_warn("CVMX_STXX_BCKPRS_CNT(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_BCKPRS_CNT()
85 cvmx_warn("CVMX_STXX_COM_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_COM_CTL()
97 cvmx_warn("CVMX_STXX_DIP_CNT(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_DIP_CNT()
109 cvmx_warn("CVMX_STXX_IGN_CAL(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_IGN_CAL()
121 cvmx_warn("CVMX_STXX_INT_MSK(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_INT_MSK()
133 cvmx_warn("CVMX_STXX_INT_REG(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_INT_REG()
145 cvmx_warn("CVMX_STXX_INT_SYNC(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_INT_SYNC()
157 cvmx_warn("CVMX_STXX_MIN_BST(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_MIN_BST()
181 cvmx_warn("CVMX_STXX_SPI4_DAT(%lu) is invalid on this chip\n", block_id); in CVMX_STXX_SPI4_DAT()
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| H A D | cvmx-ilk-defs.h | 60 cvmx_warn("CVMX_ILK_BIST_SUM not supported on this chip\n"); in CVMX_ILK_BIST_SUM_FUNC()
71 cvmx_warn("CVMX_ILK_GBL_CFG not supported on this chip\n"); in CVMX_ILK_GBL_CFG_FUNC()
82 cvmx_warn("CVMX_ILK_GBL_INT not supported on this chip\n"); in CVMX_ILK_GBL_INT_FUNC()
93 cvmx_warn("CVMX_ILK_GBL_INT_EN not supported on this chip\n"); in CVMX_ILK_GBL_INT_EN_FUNC()
104 cvmx_warn("CVMX_ILK_INT_SUM not supported on this chip\n"); in CVMX_ILK_INT_SUM_FUNC()
115 cvmx_warn("CVMX_ILK_LNE_DBG not supported on this chip\n"); in CVMX_ILK_LNE_DBG_FUNC()
126 cvmx_warn("CVMX_ILK_LNE_STS_MSG not supported on this chip\n"); in CVMX_ILK_LNE_STS_MSG_FUNC()
137 cvmx_warn("CVMX_ILK_RXF_IDX_PMAP not supported on this chip\n"); in CVMX_ILK_RXF_IDX_PMAP_FUNC()
148 cvmx_warn("CVMX_ILK_RXF_MEM_PMAP not supported on this chip\n"); in CVMX_ILK_RXF_MEM_PMAP_FUNC()
236 cvmx_warn("CVMX_ILK_RXX_INT(%lu) is invalid on this chip\n", offset); in CVMX_ILK_RXX_INT()
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| H A D | cvmx-zip-defs.h | 71 cvmx_warn("CVMX_ZIP_CMD_BUF not supported on this chip\n"); in CVMX_ZIP_CMD_BUF_FUNC()
82 cvmx_warn("CVMX_ZIP_CMD_CTL not supported on this chip\n"); in CVMX_ZIP_CMD_CTL_FUNC()
93 cvmx_warn("CVMX_ZIP_CONSTANTS not supported on this chip\n"); in CVMX_ZIP_CONSTANTS_FUNC()
126 cvmx_warn("CVMX_ZIP_CTL_CFG not supported on this chip\n"); in CVMX_ZIP_CTL_CFG_FUNC()
170 cvmx_warn("CVMX_ZIP_DEBUG0 not supported on this chip\n"); in CVMX_ZIP_DEBUG0_FUNC()
181 cvmx_warn("CVMX_ZIP_ECC_CTL not supported on this chip\n"); in CVMX_ZIP_ECC_CTL_FUNC()
192 cvmx_warn("CVMX_ZIP_ERROR not supported on this chip\n"); in CVMX_ZIP_ERROR_FUNC()
203 cvmx_warn("CVMX_ZIP_INT_ENA not supported on this chip\n"); in CVMX_ZIP_INT_ENA_FUNC()
225 cvmx_warn("CVMX_ZIP_INT_REG not supported on this chip\n"); in CVMX_ZIP_INT_REG_FUNC()
269 cvmx_warn("CVMX_ZIP_QUE_ENA not supported on this chip\n"); in CVMX_ZIP_QUE_ENA_FUNC()
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| H A D | cvmx-asxx-defs.h | 90 cvmx_warn("CVMX_ASXX_INT_EN(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_INT_EN()
105 cvmx_warn("CVMX_ASXX_INT_REG(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_INT_REG()
132 cvmx_warn("CVMX_ASXX_PRT_LOOP(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_PRT_LOOP()
144 cvmx_warn("CVMX_ASXX_RLD_BYPASS(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RLD_BYPASS()
168 cvmx_warn("CVMX_ASXX_RLD_COMP(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RLD_COMP()
251 cvmx_warn("CVMX_ASXX_RLD_SETTING(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RLD_SETTING()
281 cvmx_warn("CVMX_ASXX_RX_PRT_EN(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RX_PRT_EN()
292 cvmx_warn("CVMX_ASXX_RX_WOL(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RX_WOL()
303 cvmx_warn("CVMX_ASXX_RX_WOL_MSK(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RX_WOL_MSK()
325 cvmx_warn("CVMX_ASXX_RX_WOL_SIG(%lu) is invalid on this chip\n", block_id); in CVMX_ASXX_RX_WOL_SIG()
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| H A D | cvmx-uahcx-defs.h | 79 cvmx_warn("CVMX_UAHCX_EHCI_CONFIGFLAG(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_CONFIGFLAG()
109 cvmx_warn("CVMX_UAHCX_EHCI_FRINDEX(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_FRINDEX()
124 cvmx_warn("CVMX_UAHCX_EHCI_HCCAPBASE(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_HCCAPBASE()
139 cvmx_warn("CVMX_UAHCX_EHCI_HCCPARAMS(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_HCCPARAMS()
154 cvmx_warn("CVMX_UAHCX_EHCI_HCSPARAMS(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_HCSPARAMS()
169 cvmx_warn("CVMX_UAHCX_EHCI_INSNREG00(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_INSNREG00()
184 cvmx_warn("CVMX_UAHCX_EHCI_INSNREG03(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_INSNREG03()
274 cvmx_warn("CVMX_UAHCX_EHCI_USBCMD(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_USBCMD()
289 cvmx_warn("CVMX_UAHCX_EHCI_USBINTR(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_USBINTR()
304 cvmx_warn("CVMX_UAHCX_EHCI_USBSTS(%lu) is invalid on this chip\n", block_id); in CVMX_UAHCX_EHCI_USBSTS()
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| H A D | cvmx-dfm-defs.h | 60 cvmx_warn("CVMX_DFM_CHAR_CTL not supported on this chip\n"); in CVMX_DFM_CHAR_CTL_FUNC()
104 cvmx_warn("CVMX_DFM_COMP_CTL2 not supported on this chip\n"); in CVMX_DFM_COMP_CTL2_FUNC()
115 cvmx_warn("CVMX_DFM_CONFIG not supported on this chip\n"); in CVMX_DFM_CONFIG_FUNC()
126 cvmx_warn("CVMX_DFM_CONTROL not supported on this chip\n"); in CVMX_DFM_CONTROL_FUNC()
137 cvmx_warn("CVMX_DFM_DLL_CTL2 not supported on this chip\n"); in CVMX_DFM_DLL_CTL2_FUNC()
148 cvmx_warn("CVMX_DFM_DLL_CTL3 not supported on this chip\n"); in CVMX_DFM_DLL_CTL3_FUNC()
159 cvmx_warn("CVMX_DFM_FCLK_CNT not supported on this chip\n"); in CVMX_DFM_FCLK_CNT_FUNC()
181 cvmx_warn("CVMX_DFM_FNT_CTL not supported on this chip\n"); in CVMX_DFM_FNT_CTL_FUNC()
225 cvmx_warn("CVMX_DFM_IFB_CNT not supported on this chip\n"); in CVMX_DFM_IFB_CNT_FUNC()
258 cvmx_warn("CVMX_DFM_OPS_CNT not supported on this chip\n"); in CVMX_DFM_OPS_CNT_FUNC()
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| H A D | cvmx-npi-defs.h | 98 cvmx_warn("CVMX_NPI_BIST_STATUS not supported on this chip\n"); in CVMX_NPI_BIST_STATUS_FUNC()
128 cvmx_warn("CVMX_NPI_COMP_CTL not supported on this chip\n"); in CVMX_NPI_COMP_CTL_FUNC()
139 cvmx_warn("CVMX_NPI_CTL_STATUS not supported on this chip\n"); in CVMX_NPI_CTL_STATUS_FUNC()
150 cvmx_warn("CVMX_NPI_DBG_SELECT not supported on this chip\n"); in CVMX_NPI_DBG_SELECT_FUNC()
161 cvmx_warn("CVMX_NPI_DMA_CONTROL not supported on this chip\n"); in CVMX_NPI_DMA_CONTROL_FUNC()
249 cvmx_warn("CVMX_NPI_INT_ENB not supported on this chip\n"); in CVMX_NPI_INT_ENB_FUNC()
260 cvmx_warn("CVMX_NPI_INT_SUM not supported on this chip\n"); in CVMX_NPI_INT_SUM_FUNC()
312 cvmx_warn("CVMX_NPI_MSI_RCV not supported on this chip\n"); in CVMX_NPI_MSI_RCV_FUNC()
417 cvmx_warn("CVMX_NPI_PCI_CFG00 not supported on this chip\n"); in CVMX_NPI_PCI_CFG00_FUNC()
428 cvmx_warn("CVMX_NPI_PCI_CFG01 not supported on this chip\n"); in CVMX_NPI_PCI_CFG01_FUNC()
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| H A D | cvmx-spxx-defs.h | 61 cvmx_warn("CVMX_SPXX_BCKPRS_CNT(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_BCKPRS_CNT()
73 cvmx_warn("CVMX_SPXX_BIST_STAT(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_BIST_STAT()
85 cvmx_warn("CVMX_SPXX_CLK_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_CLK_CTL()
97 cvmx_warn("CVMX_SPXX_CLK_STAT(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_CLK_STAT()
133 cvmx_warn("CVMX_SPXX_DRV_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_DRV_CTL()
145 cvmx_warn("CVMX_SPXX_ERR_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_ERR_CTL()
157 cvmx_warn("CVMX_SPXX_INT_DAT(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_INT_DAT()
169 cvmx_warn("CVMX_SPXX_INT_MSK(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_INT_MSK()
181 cvmx_warn("CVMX_SPXX_INT_REG(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_INT_REG()
205 cvmx_warn("CVMX_SPXX_TPA_ACC(%lu) is invalid on this chip\n", block_id); in CVMX_SPXX_TPA_ACC()
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| H A D | cvmx-dfa-defs.h | 60 cvmx_warn("CVMX_DFA_BIST0 not supported on this chip\n"); in CVMX_DFA_BIST0_FUNC()
71 cvmx_warn("CVMX_DFA_BIST1 not supported on this chip\n"); in CVMX_DFA_BIST1_FUNC()
82 cvmx_warn("CVMX_DFA_BST0 not supported on this chip\n"); in CVMX_DFA_BST0_FUNC()
93 cvmx_warn("CVMX_DFA_BST1 not supported on this chip\n"); in CVMX_DFA_BST1_FUNC()
104 cvmx_warn("CVMX_DFA_CFG not supported on this chip\n"); in CVMX_DFA_CFG_FUNC()
115 cvmx_warn("CVMX_DFA_CONFIG not supported on this chip\n"); in CVMX_DFA_CONFIG_FUNC()
126 cvmx_warn("CVMX_DFA_CONTROL not supported on this chip\n"); in CVMX_DFA_CONTROL_FUNC()
137 cvmx_warn("CVMX_DFA_DBELL not supported on this chip\n"); in CVMX_DFA_DBELL_FUNC()
258 cvmx_warn("CVMX_DFA_DEBUG0 not supported on this chip\n"); in CVMX_DFA_DEBUG0_FUNC()
346 cvmx_warn("CVMX_DFA_ERR not supported on this chip\n"); in CVMX_DFA_ERR_FUNC()
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| H A D | cvmx-ciu2-defs.h | 60 cvmx_warn("CVMX_CIU2_ACK_IOX_INT(%lu) is invalid on this chip\n", block_id); in CVMX_CIU2_ACK_IOX_INT()
71 cvmx_warn("CVMX_CIU2_ACK_PPX_IP2(%lu) is invalid on this chip\n", block_id); in CVMX_CIU2_ACK_PPX_IP2()
82 cvmx_warn("CVMX_CIU2_ACK_PPX_IP3(%lu) is invalid on this chip\n", block_id); in CVMX_CIU2_ACK_PPX_IP3()
93 cvmx_warn("CVMX_CIU2_ACK_PPX_IP4(%lu) is invalid on this chip\n", block_id); in CVMX_CIU2_ACK_PPX_IP4()
137 cvmx_warn("CVMX_CIU2_EN_IOX_INT_IO(%lu) is invalid on this chip\n", block_id); in CVMX_CIU2_EN_IOX_INT_IO()
1292 cvmx_warn("CVMX_CIU2_INTR_CIU_READY not supported on this chip\n"); in CVMX_CIU2_INTR_CIU_READY_FUNC()
1303 cvmx_warn("CVMX_CIU2_INTR_RAM_ECC_CTL not supported on this chip\n"); in CVMX_CIU2_INTR_RAM_ECC_CTL_FUNC()
1314 cvmx_warn("CVMX_CIU2_INTR_RAM_ECC_ST not supported on this chip\n"); in CVMX_CIU2_INTR_RAM_ECC_ST_FUNC()
1325 cvmx_warn("CVMX_CIU2_INTR_SLOWDOWN not supported on this chip\n"); in CVMX_CIU2_INTR_SLOWDOWN_FUNC()
1369 cvmx_warn("CVMX_CIU2_MSI_RCVX(%lu) is invalid on this chip\n", offset); in CVMX_CIU2_MSI_RCVX()
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| H A D | cvmx-rad-defs.h | 60 cvmx_warn("CVMX_RAD_MEM_DEBUG0 not supported on this chip\n"); in CVMX_RAD_MEM_DEBUG0_FUNC()
71 cvmx_warn("CVMX_RAD_MEM_DEBUG1 not supported on this chip\n"); in CVMX_RAD_MEM_DEBUG1_FUNC()
82 cvmx_warn("CVMX_RAD_MEM_DEBUG2 not supported on this chip\n"); in CVMX_RAD_MEM_DEBUG2_FUNC()
104 cvmx_warn("CVMX_RAD_REG_CMD_BUF not supported on this chip\n"); in CVMX_RAD_REG_CMD_BUF_FUNC()
115 cvmx_warn("CVMX_RAD_REG_CTL not supported on this chip\n"); in CVMX_RAD_REG_CTL_FUNC()
126 cvmx_warn("CVMX_RAD_REG_DEBUG0 not supported on this chip\n"); in CVMX_RAD_REG_DEBUG0_FUNC()
137 cvmx_warn("CVMX_RAD_REG_DEBUG1 not supported on this chip\n"); in CVMX_RAD_REG_DEBUG1_FUNC()
181 cvmx_warn("CVMX_RAD_REG_DEBUG2 not supported on this chip\n"); in CVMX_RAD_REG_DEBUG2_FUNC()
192 cvmx_warn("CVMX_RAD_REG_DEBUG3 not supported on this chip\n"); in CVMX_RAD_REG_DEBUG3_FUNC()
203 cvmx_warn("CVMX_RAD_REG_DEBUG4 not supported on this chip\n"); in CVMX_RAD_REG_DEBUG4_FUNC()
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| H A D | cvmx-npei-defs.h | 72 cvmx_warn("CVMX_NPEI_BIST_STATUS not supported on this chip\n"); in CVMX_NPEI_BIST_STATUS_FUNC()
94 cvmx_warn("CVMX_NPEI_CTL_PORT0 not supported on this chip\n"); in CVMX_NPEI_CTL_PORT0_FUNC()
105 cvmx_warn("CVMX_NPEI_CTL_PORT1 not supported on this chip\n"); in CVMX_NPEI_CTL_PORT1_FUNC()
116 cvmx_warn("CVMX_NPEI_CTL_STATUS not supported on this chip\n"); in CVMX_NPEI_CTL_STATUS_FUNC()
149 cvmx_warn("CVMX_NPEI_DBG_DATA not supported on this chip\n"); in CVMX_NPEI_DBG_DATA_FUNC()
241 cvmx_warn("CVMX_NPEI_DMA_CNTS not supported on this chip\n"); in CVMX_NPEI_DMA_CNTS_FUNC()
334 cvmx_warn("CVMX_NPEI_INT_ENB not supported on this chip\n"); in CVMX_NPEI_INT_ENB_FUNC()
345 cvmx_warn("CVMX_NPEI_INT_ENB2 not supported on this chip\n"); in CVMX_NPEI_INT_ENB2_FUNC()
367 cvmx_warn("CVMX_NPEI_INT_SUM not supported on this chip\n"); in CVMX_NPEI_INT_SUM_FUNC()
1115 cvmx_warn("CVMX_NPEI_STATE1 not supported on this chip\n"); in CVMX_NPEI_STATE1_FUNC()
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| H A D | cvmx-sli-defs.h | 60 cvmx_warn("CVMX_SLI_BIST_STATUS not supported on this chip\n"); in CVMX_SLI_BIST_STATUS_FUNC()
86 cvmx_warn("CVMX_SLI_CTL_STATUS not supported on this chip\n"); in CVMX_SLI_CTL_STATUS_FUNC()
108 cvmx_warn("CVMX_SLI_DBG_DATA not supported on this chip\n"); in CVMX_SLI_DBG_DATA_FUNC()
119 cvmx_warn("CVMX_SLI_DBG_SELECT not supported on this chip\n"); in CVMX_SLI_DBG_SELECT_FUNC()
201 cvmx_warn("CVMX_SLI_INT_SUM not supported on this chip\n"); in CVMX_SLI_INT_SUM_FUNC()
315 cvmx_warn("CVMX_SLI_MSI_ENB0 not supported on this chip\n"); in CVMX_SLI_MSI_ENB0_FUNC()
326 cvmx_warn("CVMX_SLI_MSI_ENB1 not supported on this chip\n"); in CVMX_SLI_MSI_ENB1_FUNC()
337 cvmx_warn("CVMX_SLI_MSI_ENB2 not supported on this chip\n"); in CVMX_SLI_MSI_ENB2_FUNC()
1066 cvmx_warn("CVMX_SLI_STATE1 not supported on this chip\n"); in CVMX_SLI_STATE1_FUNC()
1077 cvmx_warn("CVMX_SLI_STATE2 not supported on this chip\n"); in CVMX_SLI_STATE2_FUNC()
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| H A D | cvmx-dpi-defs.h | 60 cvmx_warn("CVMX_DPI_BIST_STATUS not supported on this chip\n"); in CVMX_DPI_BIST_STATUS_FUNC()
71 cvmx_warn("CVMX_DPI_CTL not supported on this chip\n"); in CVMX_DPI_CTL_FUNC()
200 cvmx_warn("CVMX_DPI_DMA_CONTROL not supported on this chip\n"); in CVMX_DPI_DMA_CONTROL_FUNC()
254 cvmx_warn("CVMX_DPI_INFO_REG not supported on this chip\n"); in CVMX_DPI_INFO_REG_FUNC()
265 cvmx_warn("CVMX_DPI_INT_EN not supported on this chip\n"); in CVMX_DPI_INT_EN_FUNC()
276 cvmx_warn("CVMX_DPI_INT_REG not supported on this chip\n"); in CVMX_DPI_INT_REG_FUNC()
301 cvmx_warn("CVMX_DPI_PINT_INFO not supported on this chip\n"); in CVMX_DPI_PINT_INFO_FUNC()
312 cvmx_warn("CVMX_DPI_PKT_ERR_RSP not supported on this chip\n"); in CVMX_DPI_PKT_ERR_RSP_FUNC()
323 cvmx_warn("CVMX_DPI_REQ_ERR_RSP not supported on this chip\n"); in CVMX_DPI_REQ_ERR_RSP_FUNC()
345 cvmx_warn("CVMX_DPI_REQ_ERR_RST not supported on this chip\n"); in CVMX_DPI_REQ_ERR_RST_FUNC()
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| H A D | cvmx-srxx-defs.h | 61 cvmx_warn("CVMX_SRXX_COM_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_SRXX_COM_CTL()
73 cvmx_warn("CVMX_SRXX_IGN_RX_FULL(%lu) is invalid on this chip\n", block_id); in CVMX_SRXX_IGN_RX_FULL()
85 cvmx_warn("CVMX_SRXX_SPI4_CALX(%lu,%lu) is invalid on this chip\n", offset, block_id); in CVMX_SRXX_SPI4_CALX()
97 cvmx_warn("CVMX_SRXX_SPI4_STAT(%lu) is invalid on this chip\n", block_id); in CVMX_SRXX_SPI4_STAT()
109 cvmx_warn("CVMX_SRXX_SW_TICK_CTL(%lu) is invalid on this chip\n", block_id); in CVMX_SRXX_SW_TICK_CTL()
121 cvmx_warn("CVMX_SRXX_SW_TICK_DAT(%lu) is invalid on this chip\n", block_id); in CVMX_SRXX_SW_TICK_DAT()
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| H A D | cvmx-agl-defs.h | 60 cvmx_warn("CVMX_AGL_GMX_BAD_REG not supported on this chip\n"); in CVMX_AGL_GMX_BAD_REG_FUNC()
71 cvmx_warn("CVMX_AGL_GMX_BIST not supported on this chip\n"); in CVMX_AGL_GMX_BIST_FUNC()
82 cvmx_warn("CVMX_AGL_GMX_DRV_CTL not supported on this chip\n"); in CVMX_AGL_GMX_DRV_CTL_FUNC()
93 cvmx_warn("CVMX_AGL_GMX_INF_MODE not supported on this chip\n"); in CVMX_AGL_GMX_INF_MODE_FUNC()
684 cvmx_warn("CVMX_AGL_GMX_STAT_BP not supported on this chip\n"); in CVMX_AGL_GMX_STAT_BP_FUNC()
1029 cvmx_warn("CVMX_AGL_GMX_TX_BP not supported on this chip\n"); in CVMX_AGL_GMX_TX_BP_FUNC()
1051 cvmx_warn("CVMX_AGL_GMX_TX_IFG not supported on this chip\n"); in CVMX_AGL_GMX_TX_IFG_FUNC()
1062 cvmx_warn("CVMX_AGL_GMX_TX_INT_EN not supported on this chip\n"); in CVMX_AGL_GMX_TX_INT_EN_FUNC()
1084 cvmx_warn("CVMX_AGL_GMX_TX_JAM not supported on this chip\n"); in CVMX_AGL_GMX_TX_JAM_FUNC()
1095 cvmx_warn("CVMX_AGL_GMX_TX_LFSR not supported on this chip\n"); in CVMX_AGL_GMX_TX_LFSR_FUNC()
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