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/f-stack/dpdk/examples/service_cores/
H A Dmain.c65 struct profile_for_core cores[PROFILE_CORES_MAX]; member
73 .cores[0] = {.mapped_services = {1, 0, 0, 0, 0} },
74 .cores[1] = {.mapped_services = {0, 1, 0, 0, 0} },
75 .cores[2] = {.mapped_services = {0, 0, 1, 0, 0} },
76 .cores[3] = {.mapped_services = {0, 0, 0, 1, 0} },
77 .cores[4] = {.mapped_services = {0, 0, 0, 0, 1} },
83 .cores[0] = {.mapped_services = {1, 1, 0, 0, 0} },
84 .cores[1] = {.mapped_services = {0, 0, 1, 1, 0} },
85 .cores[2] = {.mapped_services = {0, 0, 0, 0, 1} },
86 .cores[3] = {.mapped_services = {0, 0, 0, 0, 0} },
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/f-stack/dpdk/app/test/
H A Dtest_stack_perf.c183 if (cores->c1 == rte_get_main_lcore()) { in run_on_core_pair()
186 rte_eal_wait_lcore(cores->c2); in run_on_core_pair()
190 rte_eal_wait_lcore(cores->c1); in run_on_core_pair()
191 rte_eal_wait_lcore(cores->c2); in run_on_core_pair()
302 struct lcore_pair cores; in __test_stack_perf() local
323 if (get_two_hyperthreads(&cores) == 0) { in __test_stack_perf()
325 run_on_core_pair(&cores, s, bulk_push_pop); in __test_stack_perf()
327 if (get_two_cores(&cores) == 0) { in __test_stack_perf()
329 run_on_core_pair(&cores, s, bulk_push_pop); in __test_stack_perf()
331 if (get_two_sockets(&cores) == 0) { in __test_stack_perf()
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H A Dtest_mempool_perf.c194 launch_cores(struct rte_mempool *mp, unsigned int cores) in launch_cores() argument
199 unsigned cores_save = cores; in launch_cores()
210 cores, n_get_bulk, n_put_bulk, n_keep); in launch_cores()
218 if (cores == 1) in launch_cores()
220 cores--; in launch_cores()
230 cores = cores_save; in launch_cores()
232 if (cores == 1) in launch_cores()
234 cores--; in launch_cores()
255 do_one_mempool_test(struct rte_mempool *mp, unsigned int cores) in do_one_mempool_test() argument
272 ret = launch_cores(mp, cores); in do_one_mempool_test()
H A Dtest_ring_perf.c300 if (cores->c1 == rte_get_main_lcore()) { in run_on_core_pair()
303 rte_eal_wait_lcore(cores->c2); in run_on_core_pair()
307 if (rte_eal_wait_lcore(cores->c1) < 0) in run_on_core_pair()
309 if (rte_eal_wait_lcore(cores->c2) < 0) in run_on_core_pair()
498 struct lcore_pair cores; in test_ring_perf_esize() local
539 if (get_two_hyperthreads(&cores) == 0) { in test_ring_perf_esize()
541 if (run_on_core_pair(&cores, r, esize) < 0) in test_ring_perf_esize()
545 if (get_two_cores(&cores) == 0) { in test_ring_perf_esize()
547 if (run_on_core_pair(&cores, r, esize) < 0) in test_ring_perf_esize()
550 if (get_two_sockets(&cores) == 0) { in test_ring_perf_esize()
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H A Dtest_func_reentrancy.c424 unsigned cores = RTE_MIN(cores_save, MAX_LCORES); in launch_test() local
434 if (cores == 1) in launch_test()
436 cores--; in launch_test()
445 cores = cores_save; in launch_test()
447 if (cores == 1) in launch_test()
449 cores--; in launch_test()
/f-stack/freebsd/arm64/arm64/
H A Dmp_machdep.c678 (*cores)++; in cpu_count_acpi_handler()
690 u_int cores; in cpu_count_acpi() local
702 cores = 0; in cpu_count_acpi()
708 return (cores); in cpu_count_acpi()
715 int cores; in cpu_mp_setmaxid() local
724 if (cores > 0) { in cpu_mp_setmaxid()
725 cores = MIN(cores, MAXCPU); in cpu_mp_setmaxid()
728 cores); in cpu_mp_setmaxid()
738 cores = MIN(cores, MAXCPU); in cpu_mp_setmaxid()
741 cores); in cpu_mp_setmaxid()
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/f-stack/dpdk/doc/guides/prog_guide/
H A Dservice_cores.rst7 DPDK has a concept known as service cores, which enables a dynamic way of
10 cores are used at runtime.
12 The service cores concept is built up out of services (components of DPDK that
13 require CPU cycles to operate) and service cores (DPDK lcores, tasked with
15 between service cores and services can be configured to abstract away the
20 PMD does not. With service cores, the application would not directly notice
28 There are two methods to having service cores in a DPDK application, either by
29 using the service coremask, or by dynamically adding cores using the API.
32 in the service coremask the cores become service-cores instead of DPDK
39 service cores. Enabling a service on a particular core means that the lcore in
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/f-stack/dpdk/usertools/
H A Dcpu_layout.py7 cores = [] variable
23 if core not in cores:
24 cores.append(core)
35 print("cores = ", cores)
39 max_processor_len = len(str(len(cores) * len(sockets) * 2 - 1))
44 max_core_id_len = len(str(max(cores)))
57 for c in cores:
/f-stack/freebsd/amd64/vmm/
H A Dx86.c99 uint16_t cores, maxcpus, sockets, threads; in x86_emulate_cpuid() local
154 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
166 width = MIN(0xF, log2(threads * cores)); in x86_emulate_cpuid()
169 logical_cpus = MIN(0xFF, threads * cores - 1); in x86_emulate_cpuid()
254 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
268 logical_cpus = threads * cores; in x86_emulate_cpuid()
295 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
397 logical_cpus = threads * cores; in x86_emulate_cpuid()
410 regs[0] |= (cores - 1) << 26; in x86_emulate_cpuid()
421 logical_cpus *= cores; in x86_emulate_cpuid()
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/f-stack/dpdk/doc/guides/sample_app_ug/
H A Dservice_cores.rst7 The service cores sample application demonstrates the service cores capabilities
8 of DPDK. The service cores infrastructure is part of the DPDK EAL, and allows
15 service cores APIs, however the sample application introduces a "profile"
17 is application specific, and not a part of the service cores API.
31 adds service cores in the application code itself, there is no requirement to
53 to the ordinary service cores header ``rte_service.h`` which provides
54 the runtime functions to add, remove and remap service cores.
84 header file provides the functions for dynamically adding and removing cores.
85 The APIs to add and remove cores use lcore IDs similar to existing DPDK
98 /* service cores are in "stopped" state when added, so start it */
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H A Dpacket_ordering.rst13 The application uses at least three CPU cores:
16 cores with traffic through SW queues.
22 * TX Core (worker core) receives traffic from Worker cores through software queues,
49 The -c EAL CPU_COREMASK option has to contain at least 3 CPU cores.
51 RX core, the last to TX core and the rest to Worker cores.
H A Dkeep_alive.rst8 heartbeat/watchdog for packet processing cores. It demonstrates how
9 to detect 'failed' DPDK cores and notify a fault management entity
19 on packet processing cores. A Keep Alive Monitor Agent Core (main)
20 monitors the state of packet processing cores (worker cores) by
22 monitoring the state of the cores. Cores states are: Alive, MIA, Dead
30 Note: Only the worker cores are monitored. A local (on the host) mechanism
H A Deventdev_pipeline.rst9 application can configure a pipeline and assign a set of worker cores to
13 configured for various numbers worker cores, stages,queue depths and cycles per
40 * ``-w FF00``: core mask for worker cores, 8 cores from 8th to 16th
58 Core part of pipeline was not assigned any cores. This will stall the
116 transmitted, and an overview of the distribution of work across worker cores.
H A Ddist_app.rst8 to cores using the Data Plane Development Kit (DPDK). It also makes use of
16 on an RX_PORT to different cores. When processed by the cores, the destination
110 Intel-SST-BF, a technology that allows some cores to run at a higher
116 frequency SST-BF cores, and when starting the application, if high frequency
117 SST-BF cores are present in the core mask, the application will identify these
118 cores and pin the workloads appropriately. The distributor core is usually
120 cores, followed by the rx core and the tx core.
H A Dvm_power_management.rst410 ``--core-branch-ratio {list of cores}:{branch ratio for listed cores}``
515 run on cores 0, 1, 2 and 3:
534 ``--vcpu-list {list vm cores}``
535 A comma-separated list of cores in the VM that the user
537 The list of cores in any VM starts at zero,
540 Valid syntax includes individual cores 2,3,4,
600 of the specified cores in the policy.
714 of the specified cores in the policy.
793 The cores to which to apply a policy.
861 Scale the frequencies of the relevant cores up/down
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/f-stack/freebsd/contrib/device-tree/Bindings/timer/
H A Dsnps,arc-timer.txt4 - Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically
5 TIMER0 used as clockevent provider (true for all ARC cores)
12 (16 for ARCHS cores, 3 for ARC700 cores)
/f-stack/freebsd/contrib/device-tree/Bindings/media/xilinx/
H A Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
10 cores are represented as defined in ../video-interfaces.txt.
18 The following properties are common to all Xilinx video IP cores.
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
H A Dxlnx,video.txt8 video IP cores. Each video IP core is represented as documented in video.txt
11 mappings between DMAs and the video IP cores.
/f-stack/freebsd/mips/broadcom/
H A Dfiles.broadcom4 # for USB 1.1 OHCI, Ethernet and IPSEC cores
30 dev/bhnd/cores/usb/bhnd_usb.c optional usb
31 dev/bhnd/cores/usb/bhnd_ehci.c optional ehci
32 dev/bhnd/cores/usb/bhnd_ohci.c optional ohci
/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dbrcm,bus-axi.txt9 The cores on the AXI bus are automatically detected by bcma with the
12 BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
17 The top-level axi bus may contain children representing attached cores
19 detected (e.g. IRQ numbers). Also some of the cores may be responsible
/f-stack/freebsd/contrib/device-tree/Bindings/arm/
H A Darm,vexpress-juno.yaml45 - description: CoreTile Express A9x4 (V2P-CA9) has 4 Cortex A9 CPU cores
51 - description: CoreTile Express A5x2 (V2P-CA5s) has 2 Cortex A5 CPU cores
58 cores in a MPCore configuration in a test chip on the core tile. See
64 A15 CPU cores in a test chip on the core tile. This is the first test
71 CPU cores and 3 Cortex A7 cores in a big.LITTLE MPCore configuration
77 cores in a test chip on the core tile. See ARM DDI 0498D.
84 AArch64 CPU cores. It has 2 Cortex A57 CPU cores and 4 Cortex A53
85 cores in a big.LITTLE configuration. It also features the MALI T624
/f-stack/dpdk/lib/librte_eal/windows/
H A Deal_lcore.c87 GROUP_AFFINITY *cores = &info->NumaNode.GroupMask; in eal_create_cpu_map() local
113 if ((cores->Mask & ((KAFFINITY)1 << i)) == 0) in eal_create_cpu_map()
124 cores->Group * EAL_PROCESSOR_GROUP_SIZE + i; in eal_create_cpu_map()
/f-stack/dpdk/examples/vm_power_manager/guest_cli/
H A Dmain.c53 unsigned short int cores[MAX_VCPU_PER_VM]; in parse_args() local
100 cnt = parse_set(optarg, cores, MAX_VCPU_PER_VM); in parse_args()
108 if (cores[i]) { in parse_args()
/f-stack/dpdk/doc/guides/cryptodevs/
H A Dscheduler.rst154 worker cores. The enqueued bursts are distributed among the worker cores in a
159 For mixed traffic (IMIX) the optimal number of worker cores is around 2-3.
161 up to eight cores.
167 * corelist: Semicolon-separated list of logical cores to be used as workers.
168 The number of worker cores should be equal to the number of worker cryptodevs.
169 These cores should be present in EAL core list parameter and
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dvexpress-v2p-ca15-tc1.dts199 volt-cores {
210 amp-cores {
211 /* Total current for the two cores */
224 power-cores {

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