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Searched refs:clr (Results 1 – 25 of 65) sorted by relevance

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/f-stack/freebsd/arm/ti/
H A Dti_scm_syscon.c117 ti_scm_syscon_modify_4(struct syscon *syscon, bus_size_t offset, uint32_t clr, uint32_t set) in ti_scm_syscon_modify_4() argument
126 reg &= ~clr; in ti_scm_syscon_modify_4()
130 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", offset, reg, clr, set); in ti_scm_syscon_modify_4()
240 ti_scm_syscon_clk_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_scm_syscon_clk_modify_4() argument
248 reg &= ~clr; in ti_scm_syscon_clk_modify_4()
251 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); in ti_scm_syscon_clk_modify_4()
H A Dti_prm.c178 ti_prm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_prm_modify_4() argument
187 ti_prcm_modify_4(parent, addr, clr, set); in ti_prm_modify_4()
189 DPRINTF(sc->dev, "offset=%lx (clr %x set %x)\n", addr, clr, set); in ti_prm_modify_4()
H A Dti_prcm.c227 ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in ti_prcm_modify_4() argument
235 reg &= ~clr; in ti_prcm_modify_4()
238 DPRINTF(sc->dev, "offset=%lx reg: %x (clr %x set %x)\n", addr, reg, clr, set); in ti_prcm_modify_4()
H A Dti_prm.h36 int ti_prm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set);
H A Dti_prcm.h35 int ti_prcm_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set);
/f-stack/freebsd/arm64/freescale/imx/clk/
H A Dimx_clk_gate.c46 #define MD4(_clk, off, clr, set ) \ argument
47 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
H A Dimx_clk_mux.c50 #define MD4(_clk, off, clr, set ) \ argument
51 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-gpio-defs.h676 uint64_t clr : 24; /**< Bit mask to indicate which GPIO_TX_DAT bits to set member
680 uint64_t clr : 24;
689 …uint64_t clr : 16; /**< Bit mask to indicate which bits to drive to '0'. … member
691 uint64_t clr : 16;
706 uint64_t clr : 20; /**< Bit mask to indicate which GPIO_TX_DAT bits to set member
710 uint64_t clr : 20;
H A Dcvmx-ilk.c1238 ilk_rxx_idx_stat0.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1247 ilk_rxx_idx_stat1.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1260 ilk_txx_idx_stat0.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1269 ilk_txx_idx_stat1.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1288 ilk_rxx_idx_stat0.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1294 ilk_rxx_idx_stat1.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1300 ilk_txx_idx_stat0.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
1306 ilk_txx_idx_stat1.s.clr = pstats->clr_on_rd; in cvmx_ilk_show_stats()
/f-stack/freebsd/mips/mediatek/
H A Dmtk_sysctl.c163 mtk_sysctl_clr_set(uint32_t reg, uint32_t clr, uint32_t set) in mtk_sysctl_clr_set() argument
169 val &= ~(clr); in mtk_sysctl_clr_set()
H A Dmtk_pcie.h153 #define MT_CLR_SET32(sc, off, clr, set) \ argument
154 MT_WRITE32((sc), (off), ((MT_READ32((sc), (off)) & ~(clr)) | (off)))
/f-stack/freebsd/arm64/rockchip/clk/
H A Drk_clk_gate.c46 #define MD4(_clk, off, clr, set ) \ argument
47 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
H A Drk_clk_mux.c51 #define MD4(_clk, off, clr, set ) \ argument
52 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
H A Drk_clk_fract.c45 #define MD4(_clk, off, clr, set ) \ argument
46 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
H A Drk_cru.c99 rk_cru_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in rk_cru_modify_4() argument
107 reg &= ~clr; in rk_cru_modify_4()
/f-stack/freebsd/contrib/device-tree/Bindings/mfd/
H A D88pm860x.txt12 - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read
38 marvell,88pm860x-irq-read-clr;
/f-stack/dpdk/examples/service_cores/
H A Dmain.c205 const char clr[] = { 27, '[', '2', 'J', '\0' }; in main() local
207 printf("%s%s", clr, topLeft); in main()
/f-stack/freebsd/arm/allwinner/clkng/
H A Daw_clk_prediv_mux.c67 #define MODIFY4(_clk, off, clr, set ) \ argument
68 CLKDEV_MODIFY_4(clknode_get_device(_clk), off, clr, set)
H A Daw_ccung.c105 aw_ccung_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in aw_ccung_modify_4() argument
112 dprintf("offset=%lx clr: %x set: %x\n", addr, clr, set); in aw_ccung_modify_4()
114 reg &= ~clr; in aw_ccung_modify_4()
/f-stack/freebsd/arm/allwinner/
H A Daw_ccu.c121 aw_ccu_modify_4(device_t dev, bus_addr_t addr, uint32_t clr, uint32_t set) in aw_ccu_modify_4() argument
135 val &= ~clr; in aw_ccu_modify_4()
/f-stack/dpdk/examples/multi_process/client_server_mp/mp_server/
H A Dmain.c98 const char clr[] = { 27, '[', '2', 'J', '\0' }; in do_stats_display() local
123 printf("%s%s", clr, topLeft); in do_stats_display()
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dmax77620.h228 #define RM1(sc, reg, clr, set) max77620_modify(sc, reg, clr, set) argument
/f-stack/freebsd/contrib/openzfs/module/lua/setjmp/
H A Dsetjmp_sparc64.S76 clr %o0
/f-stack/dpdk/examples/server_node_efd/server/
H A Dmain.c106 const char clr[] = {27, '[', '2', 'J', '\0'}; in do_stats_display() local
132 printf("%s%s", clr, topLeft); in do_stats_display()
/f-stack/freebsd/arm/nvidia/
H A Das3722.h287 #define RM1(sc, reg, clr, set) as3722_modify(sc, reg, clr, set) argument

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