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/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dimx27.dtsi114 <&clks IMX27_CLK_PER1_GATE>;
123 <&clks IMX27_CLK_PER1_GATE>;
132 <&clks IMX27_CLK_PER1_GATE>;
142 <&clks IMX27_CLK_PER1_GATE>;
175 <&clks IMX27_CLK_PER1_GATE>;
185 <&clks IMX27_CLK_PER1_GATE>;
195 <&clks IMX27_CLK_PER1_GATE>;
490 <&clks IMX27_CLK_USB_DIV>;
502 <&clks IMX27_CLK_USB_DIV>;
515 <&clks IMX27_CLK_USB_DIV>;
[all …]
H A Dimx6ul.dtsi83 <&clks IMX6UL_CLK_STEP>,
84 <&clks IMX6UL_CLK_PLL1_SW>,
307 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
322 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
337 <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>;
350 <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>,
351 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
352 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
353 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
354 <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>,
[all …]
H A Dimx6sx.dtsi83 <&clks IMX6SX_CLK_STEP>,
197 <&clks IMX6SX_CLK_GPU>,
260 <&clks 0>, <&clks 0>, <&clks 0>,
262 <&clks 0>, <&clks 0>,
397 <&clks IMX6SX_CLK_ASRC_MEM>, <&clks 0>,
398 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
399 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
400 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
401 <&clks IMX6SX_CLK_SPDIF>, <&clks 0>, <&clks 0>,
1104 <&clks 0>, <&clks 0>;
[all …]
H A Dimx25.dtsi116 clocks = <&clks 75>, <&clks 75>;
125 clocks = <&clks 76>, <&clks 76>;
134 clocks = <&clks 120>, <&clks 57>;
143 clocks = <&clks 121>, <&clks 57>;
174 clocks = <&clks 78>, <&clks 78>;
216 clocks = <&clks 80>, <&clks 80>;
460 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
469 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
478 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
556 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
[all …]
H A Dvfxxx.dtsi94 <&clks VF610_CLK_DMAMUX1>;
192 <&clks 0>, <&clks 0>;
206 <&clks 0>, <&clks 0>;
220 <&clks 0>, <&clks 0>;
234 <&clks 0>, <&clks 0>;
313 <&clks VF610_CLK_QSPI0>;
440 clks: ccm@4006b000 { label
625 <&clks VF610_CLK_FTM3>,
639 <&clks VF610_CLK_QSPI1>;
668 <&clks VF610_CLK_ENET>;
[all …]
H A Dimx53.dtsi56 clocks = <&clks IMX5_CLK_ARM>;
147 <&clks IMX5_CLK_SATA_REF>,
148 <&clks IMX5_CLK_AHB>;
160 <&clks IMX5_CLK_IPU_DI0_GATE>,
221 clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
244 <&clks IMX5_CLK_DUMMY>,
256 <&clks IMX5_CLK_DUMMY>,
309 <&clks IMX5_CLK_DUMMY>,
321 <&clks IMX5_CLK_DUMMY>,
598 clks: ccm@53fd4000{ label
[all …]
H A Dimx6qdl.dtsi308 clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
309 <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
310 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
311 <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_DUMMY>,
312 <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
458 <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>,
459 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
460 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
461 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
462 <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>,
[all …]
H A Dimx51.dtsi135 clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>;
146 <&clks IMX5_CLK_IPU_DI0_GATE>,
193 <&clks IMX5_CLK_DUMMY>,
204 <&clks IMX5_CLK_DUMMY>,
253 <&clks IMX5_CLK_DUMMY>,
265 <&clks IMX5_CLK_DUMMY>,
449 clks: ccm@73fd4000{ label
506 <&clks IMX5_CLK_AHB>;
627 <&clks IMX5_CLK_FEC_GATE>,
628 <&clks IMX5_CLK_FEC_GATE>;
[all …]
H A Dimx6sll.dtsi69 <&clks IMX6SLL_CLK_PLL2_PFD2>,
70 <&clks IMX6SLL_CLK_STEP>,
71 <&clks IMX6SLL_CLK_PLL1_SW>,
72 <&clks IMX6SLL_CLK_PLL1_SYS>;
160 <&clks IMX6SLL_CLK_OSC>,
165 <&clks IMX6SLL_CLK_IPG>,
168 <&clks IMX6SLL_CLK_SPBA>;
322 <&clks IMX6SLL_CLK_PWM1>;
332 <&clks IMX6SLL_CLK_PWM2>;
342 <&clks IMX6SLL_CLK_PWM3>;
[all …]
H A Dimx6qp.dtsi12 clocks = <&clks IMX6QDL_CLK_OCRAM>;
18 clocks = <&clks IMX6QDL_CLK_OCRAM>;
26 clocks = <&clks IMX6QDL_CLK_PRE0>;
35 clocks = <&clks IMX6QDL_CLK_PRE1>;
44 clocks = <&clks IMX6QDL_CLK_PRE2>;
62 <&clks IMX6QDL_CLK_PRG0_AXI>;
71 <&clks IMX6QDL_CLK_PRG1_AXI>;
99 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
100 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
101 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
[all …]
H A Dimx35.dtsi101 clocks = <&clks 9>, <&clks 70>;
110 clocks = <&clks 9>, <&clks 71>;
145 clocks = <&clks 35 &clks 35>;
175 clocks = <&clks 9>, <&clks 72>;
187 clocks = <&clks 36 &clks 36>;
195 clocks = <&clks 46>, <&clks 8>;
238 clocks = <&clks 9>, <&clks 8>, <&clks 43>;
247 clocks = <&clks 9>, <&clks 8>, <&clks 44>;
256 clocks = <&clks 9>, <&clks 8>, <&clks 45>;
334 clocks = <&clks 9>, <&clks 73>, <&clks 28>;
[all …]
H A Dimx50.dtsi123 <&clks IMX5_CLK_DUMMY>,
135 <&clks IMX5_CLK_DUMMY>,
184 <&clks IMX5_CLK_DUMMY>,
196 <&clks IMX5_CLK_DUMMY>,
274 clocks = <&clks IMX5_CLK_DUMMY>;
282 <&clks IMX5_CLK_GPT_HF_GATE>;
296 <&clks IMX5_CLK_PWM1_HF_GATE>;
338 clks: ccm@53fd4000{ label
429 <&clks IMX5_CLK_AHB>;
492 <&clks IMX5_CLK_FEC_GATE>,
[all …]
H A Dimx6q.dtsi44 <&clks IMX6QDL_CLK_STEP>,
45 <&clks IMX6QDL_CLK_PLL1_SW>,
46 <&clks IMX6QDL_CLK_PLL1_SYS>;
81 <&clks IMX6QDL_CLK_STEP>,
116 <&clks IMX6QDL_CLK_STEP>,
151 <&clks IMX6QDL_CLK_STEP>,
197 <&clks IMX6QDL_CLK_AHB>;
437 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
438 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
439 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
[all …]
H A Dimx31.dtsi105 clocks = <&clks 10>, <&clks 30>;
114 clocks = <&clks 10>, <&clks 31>;
133 clocks = <&clks 10>, <&clks 53>;
153 clocks = <&clks 10>, <&clks 49>;
163 clocks = <&clks 10>, <&clks 50>;
180 clocks = <&clks 10>, <&clks 20>;
191 clocks = <&clks 10>, <&clks 21>;
202 clocks = <&clks 10>, <&clks 48>;
211 clocks = <&clks 10>, <&clks 54>;
246 clocks = <&clks 10>, <&clks 28>;
[all …]
H A Dimx6sl.dtsi69 clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
70 <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
71 <&clks IMX6SL_CLK_PLL1_SYS>;
161 clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
162 <&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
163 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
164 <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
165 <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
342 <&clks IMX6SL_CLK_PWM1>;
352 <&clks IMX6SL_CLK_PWM2>;
[all …]
H A Dimx7s.dtsi75 clocks = <&clks IMX7D_CLK_ARM>;
441 <&clks IMX7D_GPT1_ROOT_CLK>;
450 <&clks IMX7D_GPT2_ROOT_CLK>;
460 <&clks IMX7D_GPT3_ROOT_CLK>;
757 <&clks IMX7D_CLK_DUMMY>;
898 <&clks IMX7D_CLK_DUMMY>,
899 <&clks IMX7D_CLK_DUMMY>;
913 <&clks IMX7D_CLK_DUMMY>,
914 <&clks IMX7D_CLK_DUMMY>;
928 <&clks IMX7D_CLK_DUMMY>,
[all …]
H A Dimx1.dtsi83 <&clks IMX1_CLK_PER1>;
92 <&clks IMX1_CLK_PER1>;
101 <&clks IMX1_CLK_DUMMY>,
102 <&clks IMX1_CLK_PER2>;
112 <&clks IMX1_CLK_PER1>;
122 <&clks IMX1_CLK_PER1>;
133 <&clks IMX1_CLK_PER1>;
152 <&clks IMX1_CLK_PER1>;
172 <&clks IMX1_CLK_PER1>;
194 <&clks IMX1_CLK_PER1>;
[all …]
H A Datlas6.dtsi28 clocks = <&clks 12>;
85 clocks = <&clks 42>;
99 clocks = <&clks 5>;
106 clocks = <&clks 32>;
120 clocks = <&clks 34>;
131 clocks = <&clks 35>;
146 clocks = <&clks 32>;
160 clocks = <&clks 33>;
181 clocks = <&clks 9>;
189 clocks = <&clks 8>;
[all …]
H A Dimx6dl.dtsi37 clocks = <&clks IMX6QDL_CLK_ARM>,
39 <&clks IMX6QDL_CLK_STEP>,
40 <&clks IMX6QDL_CLK_PLL1_SW>,
41 <&clks IMX6QDL_CLK_PLL1_SYS>;
70 clocks = <&clks IMX6QDL_CLK_ARM>,
72 <&clks IMX6QDL_CLK_STEP>,
73 <&clks IMX6QDL_CLK_PLL1_SW>,
74 <&clks IMX6QDL_CLK_PLL1_SYS>;
308 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
309 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
[all …]
H A Dprima2.dtsi30 clocks = <&clks 12>;
96 clocks = <&clks 42>;
110 clocks = <&clks 5>;
117 clocks = <&clks 32>;
137 clocks = <&clks 35>;
152 clocks = <&clks 32>;
166 clocks = <&clks 33>;
187 clocks = <&clks 9>;
195 clocks = <&clks 8>;
211 clocks = <&clks 11>;
[all …]
H A Dpxa27x.dtsi35 clocks = <&clks CLK_NONE>;
42 clocks = <&clks CLK_USBHOST>;
50 clocks = <&clks CLK_PWM0>;
57 clocks = <&clks CLK_PWM1>;
64 clocks = <&clks CLK_PWM0>;
71 clocks = <&clks CLK_PWM1>;
78 clocks = <&clks CLK_PWRI2C>;
88 clocks = <&clks CLK_USB>;
96 clocks = <&clks CLK_KEYPAD>;
109 clocks = <&clks CLK_CAMERA>;
[all …]
H A Dimx7d.dtsi70 clocks = <&clks IMX7D_USB_PHY2_CLK>;
87 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
126 clocks = <&clks IMX7D_USB_CTRL_CLK>;
148 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
149 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
150 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
151 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
186 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
187 <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
190 <&clks IMX7D_PCIE_PHY_ROOT_SRC>;
[all …]
/f-stack/freebsd/contrib/device-tree/src/powerpc/
H A Dmpc5121.dtsi51 <&clks MPC512x_CLK_MBX_3D>,
52 <&clks MPC512x_CLK_MBX>;
134 clks: clock@f00 { label
160 <&clks MPC512x_CLK_IPS>,
161 <&clks MPC512x_CLK_SYS>,
162 <&clks MPC512x_CLK_REF>,
172 <&clks MPC512x_CLK_IPS>,
173 <&clks MPC512x_CLK_SYS>,
174 <&clks MPC512x_CLK_REF>,
246 <&clks MPC512x_CLK_IPS>,
[all …]
H A Dmpc5125twr.dts99 clks: clock@f00 { // Clock control label
130 <&clks MPC512x_CLK_IPS>,
131 <&clks MPC512x_CLK_SYS>,
132 <&clks MPC512x_CLK_REF>,
142 <&clks MPC512x_CLK_IPS>,
143 <&clks MPC512x_CLK_SYS>,
144 <&clks MPC512x_CLK_REF>,
153 clocks = <&clks MPC512x_CLK_IPS>,
154 <&clks MPC512x_CLK_SDHC>;
164 clocks = <&clks MPC512x_CLK_I2C>;
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/sound/
H A Dfsl,asrc.txt64 clocks = <&clks 107>, <&clks 107>, <&clks 0>,
65 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
66 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
67 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
68 <&clks 107>, <&clks 0>, <&clks 0>;

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