| /f-stack/freebsd/arm/ti/am335x/ |
| H A D | am335x_ehrpwm.c | 247 u_int clkdiv, hspclkdiv, pwmclk, pwmtick, tbprd; in am335x_ehrpwm_cfg_period() local
262 for (clkdiv = 0; clkdiv < 8; ++clkdiv) { in am335x_ehrpwm_cfg_period()
263 const u_int cd = 1 << clkdiv; in am335x_ehrpwm_cfg_period()
300 clkdiv, hspclkdiv, tbprd - 1, in am335x_ehrpwm_cfg_period()
317 int clkdiv; in am335x_ehrpwm_freq() local
326 int clkdiv, error, freq, i, period; in am335x_ehrpwm_sysctl_freq() local
346 clkdiv = am335x_ehrpwm_clkdiv[i]; in am335x_ehrpwm_sysctl_freq()
347 period = PWM_CLOCK / clkdiv / freq; in am335x_ehrpwm_sysctl_freq()
375 int error, i, clkdiv; in am335x_ehrpwm_sysctl_clkdiv() local
385 error = sysctl_handle_int(oidp, &clkdiv, sizeof(clkdiv), req); in am335x_ehrpwm_sysctl_clkdiv()
[all …]
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| /f-stack/freebsd/contrib/octeon-sdk/ |
| H A D | cvmx-mpi-defs.h | 124 …uint64_t clkdiv : 13; /**< Fspi_clk = Fsclk / (2 * CLKDIV) … member
190 uint64_t clkdiv : 13;
197 uint64_t clkdiv : 13; /**< Fsclk = Feclk / (2 * CLKDIV) member
244 uint64_t clkdiv : 13;
251 uint64_t clkdiv : 13; /**< Fsclk = Feclk / (2 * CLKDIV) member
294 uint64_t clkdiv : 13;
302 …uint64_t clkdiv : 13; /**< Fspi_clk = Fsclk / (2 * CLKDIV) … member
361 uint64_t clkdiv : 13;
368 …uint64_t clkdiv : 13; /**< Fspi_clk = Fsclk / (2 * CLKDIV) … member
427 uint64_t clkdiv : 13;
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| H A D | cvmx-llm.c | 412 clkdiv = eclk_mhz/max_llm_clock_mhz; in rld_csr_config_generate()
413 if (clkdiv * max_llm_clock_mhz < eclk_mhz) in rld_csr_config_generate()
414 clkdiv++; in rld_csr_config_generate()
416 if (clkdiv > 4) in rld_csr_config_generate()
421 if (clkdiv < 2) in rld_csr_config_generate()
422 clkdiv = 2; in rld_csr_config_generate()
424 …tf("Using llm clock divisor: %d, llm clock is: %lu MHz\n", clkdiv, (unsigned long)eclk_mhz/clkdiv); in rld_csr_config_generate()
431 if (clkdiv == 2) in rld_csr_config_generate()
434 clkdiv_enc = clkdiv - 1; in rld_csr_config_generate()
437 if (clkdiv == 0x3) in rld_csr_config_generate()
[all …]
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| H A D | cvmx-dfa-defs.h | 3499 uint64_t clkdiv : 2; /**< RLDCLK Divisor Select member
3774 uint64_t clkdiv : 2;
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| /f-stack/freebsd/contrib/device-tree/Bindings/clock/ |
| H A D | qcom,spmi-clkdiv.txt | 1 Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
3 clkdiv configures the clock frequency of a set of outputs on the PMIC.
14 Definition: must be "qcom,spmi-clkdiv".
46 compatible = "qcom,spmi-clkdiv";
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| H A D | renesas,emev2-smu.txt | 21 - compatible: Should be "renesas,emev2-smu-clkdiv"
40 compatible = "renesas,emev2-smu-clkdiv";
87 compatible = "renesas,emev2-smu-clkdiv";
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| /f-stack/freebsd/arm/ti/ |
| H A D | ti_sdhci.c | 176 uint32_t clkdiv, val32; in ti_sdhci_read_2() local
193 clkdiv = ((val32 >> MMCHS_SYSCTL_CLKD_SHIFT) & in ti_sdhci_read_2()
196 val32 |= (clkdiv & SDHCI_DIVIDER_MASK) << SDHCI_DIVIDER_SHIFT; in ti_sdhci_read_2()
198 val32 |= ((clkdiv >> SDHCI_DIVIDER_MASK_LEN) & in ti_sdhci_read_2()
283 uint32_t clkdiv, val32; in ti_sdhci_write_2() local
291 clkdiv = (val >> SDHCI_DIVIDER_SHIFT) & SDHCI_DIVIDER_MASK; in ti_sdhci_write_2()
293 clkdiv |= ((val >> SDHCI_DIVIDER_HI_SHIFT) & in ti_sdhci_write_2()
295 clkdiv *= 2; in ti_sdhci_write_2()
296 if (clkdiv > MMCHS_SYSCTL_CLKD_MASK) in ti_sdhci_write_2()
297 clkdiv = MMCHS_SYSCTL_CLKD_MASK; in ti_sdhci_write_2()
[all …]
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| H A D | ti_spi.c | 123 uint32_t clkdiv, conf, div, extclk, reg; in ti_spi_set_clock() local
125 clkdiv = TI_SPI_GCLK / freq; in ti_spi_set_clock()
126 if (clkdiv > MCSPI_EXTCLK_MSK) { in ti_spi_set_clock()
128 clkdiv = 0; in ti_spi_set_clock()
130 while (TI_SPI_GCLK / div > freq && clkdiv <= 0xf) { in ti_spi_set_clock()
131 clkdiv++; in ti_spi_set_clock()
134 conf = clkdiv << MCSPI_CONF_CLK_SHIFT; in ti_spi_set_clock()
136 extclk = clkdiv >> 4; in ti_spi_set_clock()
137 clkdiv &= MCSPI_CONF_CLK_MSK; in ti_spi_set_clock()
138 conf = MCSPI_CONF_CLKG | clkdiv << MCSPI_CONF_CLK_SHIFT; in ti_spi_set_clock()
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| /f-stack/freebsd/arm64/rockchip/ |
| H A D | rk_i2c.c | 170 uint32_t clkdiv; in rk_i2c_get_clkdiv() local
177 clkdiv = (sclk_freq / speed / RK_I2C_CLKDIV_MUL / 2) - 1; in rk_i2c_get_clkdiv()
178 clkdiv &= RK_I2C_CLKDIVL_MASK; in rk_i2c_get_clkdiv()
180 clkdiv = clkdiv << RK_I2C_CLKDIVH_SHIFT | clkdiv; in rk_i2c_get_clkdiv()
182 return (clkdiv); in rk_i2c_get_clkdiv()
189 uint32_t clkdiv; in rk_i2c_reset() local
196 clkdiv = rk_i2c_get_clkdiv(sc, busfreq); in rk_i2c_reset()
201 RK_I2C_WRITE(sc, RK_I2C_CLKDIV, clkdiv); in rk_i2c_reset()
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | emev2.dtsi | 72 compatible = "renesas,emev2-smu-clkdiv";
84 compatible = "renesas,emev2-smu-clkdiv";
103 compatible = "renesas,emev2-smu-clkdiv";
109 compatible = "renesas,emev2-smu-clkdiv";
115 compatible = "renesas,emev2-smu-clkdiv";
121 compatible = "renesas,emev2-smu-clkdiv";
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| /f-stack/freebsd/contrib/device-tree/Bindings/iio/frequency/ |
| H A D | adf4350.txt | 49 adi,12bit-clkdiv-mode != 0
51 Valid values for the clkdiv mode are:
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| /f-stack/freebsd/arm/freescale/imx/ |
| H A D | imx_i2c.c | 115 struct clkdiv { struct
119 static struct clkdiv clkdiv_table[] = { argument
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| /f-stack/freebsd/contrib/device-tree/src/arc/ |
| H A D | abilis_tb10x.dtsi | 197 output-clkdiv = <4>;
|