Searched refs:clk_cnt (Results 1 – 5 of 5) sorted by relevance
1009 agl_clk.s.clk_cnt = 1; /* MII (both speeds) and RGMII 1000 setting */ in cvmx_mgmt_port_link_set()1013 agl_clk.s.clk_cnt = 50; in cvmx_mgmt_port_link_set()1015 agl_clk.s.clk_cnt = 5; in cvmx_mgmt_port_link_set()
1020 uint64_t clk_cnt : 64; /**< This counter will be zeroed when reset is applied member1024 uint64_t clk_cnt : 64;
3510 …uint64_t clk_cnt : 6; /**< Controls the RGMII TXC frequency … member3514 uint64_t clk_cnt : 6;
3414 …uint64_t clk_cnt : 26; /**< Number of CLK_CNT cycles to wait for the card to … member3417 uint64_t clk_cnt : 26;
8035 uint64_t clk_cnt : 6; /**< Controls the RGMII TXC frequency member8043 uint64_t clk_cnt : 6;