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/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dstih410-clock.dtsi10 clk_sysin: clk-sysin {
94 "clk-ic-lmi1";
149 "clk-fdma",
150 "clk-nand",
151 "clk-hva",
158 "clk-mmc-0",
159 "clk-mmc-1",
239 "clk-pcm-1",
283 "clk-denc",
288 "clk-dvo",
[all …]
H A Dstih418-clock.dtsi10 clk_sysin: clk-sysin {
94 "clk-ic-lmi1";
146 "clk-fdma",
147 "clk-nand",
148 "clk-hva",
150 "clk-tp",
155 "clk-mmc-0",
156 "clk-mmc-1",
277 "clk-denc",
282 "clk-dvo",
[all …]
H A Dstih407-clock.dtsi10 clk_sysin: clk-sysin {
148 "clk-fdma",
149 "clk-nand",
150 "clk-hva",
157 "clk-mmc-0",
158 "clk-mmc-1",
231 "clk-pcm-1",
232 "clk-pcm-2",
273 "clk-denc",
278 "clk-dvo",
[all …]
/f-stack/freebsd/arm64/rockchip/clk/
H A Drk_clk_pll.c93 DEVICE_LOCK(clk); in rk_clk_pll_set_gate()
95 DEVICE_UNLOCK(clk); in rk_clk_pll_set_gate()
132 DEVICE_LOCK(clk); in rk3066_clk_pll_init()
154 DEVICE_LOCK(clk); in rk3066_clk_pll_set_mux()
170 DEVICE_LOCK(clk); in rk3066_clk_pll_recalc()
230 DEVICE_LOCK(clk); in rk3066_clk_pll_set_freq()
324 if (clk == NULL) in rk3066_clk_pll_register()
396 DEVICE_LOCK(clk); in rk3328_clk_pll_recalc()
457 DEVICE_LOCK(clk); in rk3328_clk_pll_set_freq()
530 if (clk == NULL) in rk3328_clk_pll_register()
[all …]
H A Drk_clk_composite.c140 DEVICE_LOCK(clk); in rk_clk_composite_init()
142 DEVICE_UNLOCK(clk); in rk_clk_composite_init()
169 DEVICE_LOCK(clk); in rk_clk_composite_set_gate()
171 DEVICE_UNLOCK(clk); in rk_clk_composite_set_gate()
188 DEVICE_LOCK(clk); in rk_clk_composite_set_mux()
193 DEVICE_UNLOCK(clk); in rk_clk_composite_set_mux()
206 DEVICE_LOCK(clk); in rk_clk_composite_recalc()
211 DEVICE_UNLOCK(clk); in rk_clk_composite_recalc()
313 DEVICE_LOCK(clk); in rk_clk_composite_set_freq()
318 DEVICE_UNLOCK(clk); in rk_clk_composite_set_freq()
[all …]
H A Drk_clk_mux.c94 sc = clknode_get_softc(clk); in rk_clk_mux_init()
96 DEVICE_LOCK(clk); in rk_clk_mux_init()
98 DEVICE_UNLOCK(clk); in rk_clk_mux_init()
114 sc = clknode_get_softc(clk); in rk_clk_mux_set_mux()
116 DEVICE_LOCK(clk); in rk_clk_mux_set_mux()
120 DEVICE_UNLOCK(clk); in rk_clk_mux_set_mux()
123 RD4(clk, sc->offset, &reg); in rk_clk_mux_set_mux()
124 DEVICE_UNLOCK(clk); in rk_clk_mux_set_mux()
139 sc = clknode_get_softc(clk); in rk_clk_mux_set_freq()
185 struct clknode *clk; in rk_clk_mux_register() local
[all …]
H A Drk_clk_fract.c146 sc = clknode_get_softc(clk); in rk_clk_fract_init()
147 DEVICE_LOCK(clk); in rk_clk_fract_init()
148 RD4(clk, sc->offset, &reg); in rk_clk_fract_init()
149 DEVICE_UNLOCK(clk); in rk_clk_fract_init()
164 sc = clknode_get_softc(clk); in rk_clk_fract_set_gate()
175 DEVICE_LOCK(clk); in rk_clk_fract_set_gate()
177 DEVICE_UNLOCK(clk); in rk_clk_fract_set_gate()
254 DEVICE_LOCK(clk); in rk_clk_fract_set_freq()
256 DEVICE_UNLOCK(clk); in rk_clk_fract_set_freq()
266 struct clknode *clk; in rk_clk_fract_register() local
[all …]
H A Drk_clk_gate.c81 sc = clknode_get_softc(clk); in rk_clk_gate_init()
82 DEVICE_LOCK(clk); in rk_clk_gate_init()
84 DEVICE_UNLOCK(clk); in rk_clk_gate_init()
100 sc = clknode_get_softc(clk); in rk_clk_gate_set_gate()
102 DEVICE_LOCK(clk); in rk_clk_gate_set_gate()
107 DEVICE_UNLOCK(clk); in rk_clk_gate_set_gate()
110 RD4(clk, sc->offset, &reg); in rk_clk_gate_set_gate()
111 DEVICE_UNLOCK(clk); in rk_clk_gate_set_gate()
118 struct clknode *clk; in rk_clk_gate_register() local
122 if (clk == NULL) in rk_clk_gate_register()
[all …]
H A Drk_clk_armclk.c89 sc = clknode_get_softc(clk); in rk_clk_armclk_init()
92 DEVICE_LOCK(clk); in rk_clk_armclk_init()
94 DEVICE_UNLOCK(clk); in rk_clk_armclk_init()
112 DEVICE_LOCK(clk); in rk_clk_armclk_set_mux()
117 DEVICE_UNLOCK(clk); in rk_clk_armclk_set_mux()
130 DEVICE_LOCK(clk); in rk_clk_armclk_recalc()
135 DEVICE_UNLOCK(clk); in rk_clk_armclk_recalc()
197 DEVICE_LOCK(clk); in rk_clk_armclk_set_freq()
202 DEVICE_UNLOCK(clk); in rk_clk_armclk_set_freq()
226 struct clknode *clk; in rk_clk_armclk_register() local
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/clock/st/
H A Dst,flexgen.txt92 "clk-fdma",
93 "clk-nand",
94 "clk-hva",
96 "clk-proc-tp",
99 "clk-icn-cpu",
101 "clk-mmc-0",
102 "clk-mmc-1",
103 "clk-jpegdec",
104 "clk-ext2fa9",
107 "clk-pp-dmu",
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dallwinner,sun4i-a10-gates-clk.yaml24 - const: allwinner,sun4i-a10-gates-clk
25 - const: allwinner,sun4i-a10-axi-gates-clk
26 - const: allwinner,sun4i-a10-ahb-gates-clk
27 - const: allwinner,sun5i-a10s-ahb-gates-clk
28 - const: allwinner,sun5i-a13-ahb-gates-clk
29 - const: allwinner,sun7i-a20-ahb-gates-clk
30 - const: allwinner,sun6i-a31-ahb1-gates-clk
31 - const: allwinner,sun8i-a23-ahb1-gates-clk
88 clk@1c2005c {
98 clk@1c20060 {
[all …]
/f-stack/freebsd/arm64/freescale/imx/clk/
H A Dimx_clk_composite.c87 DEVICE_LOCK(clk); in imx_clk_composite_init()
89 DEVICE_UNLOCK(clk); in imx_clk_composite_init()
106 DEVICE_LOCK(clk); in imx_clk_composite_set_gate()
113 DEVICE_UNLOCK(clk); in imx_clk_composite_set_gate()
127 DEVICE_LOCK(clk); in imx_clk_composite_set_mux()
132 DEVICE_UNLOCK(clk); in imx_clk_composite_set_mux()
145 DEVICE_LOCK(clk); in imx_clk_composite_recalc()
147 DEVICE_UNLOCK(clk); in imx_clk_composite_recalc()
264 DEVICE_LOCK(clk); in imx_clk_composite_set_freq()
269 DEVICE_UNLOCK(clk); in imx_clk_composite_set_freq()
[all …]
H A Dimx_clk_sscg_pll.c86 sc = clknode_get_softc(clk); in imx_clk_sscg_pll_init()
104 sc = clknode_get_softc(clk); in imx_clk_sscg_pll_set_gate()
106 DEVICE_LOCK(clk); in imx_clk_sscg_pll_set_gate()
124 DEVICE_UNLOCK(clk); in imx_clk_sscg_pll_set_gate()
136 sc = clknode_get_softc(clk); in imx_clk_sscg_pll_recalc()
138 DEVICE_LOCK(clk); in imx_clk_sscg_pll_recalc()
141 DEVICE_UNLOCK(clk); in imx_clk_sscg_pll_recalc()
180 struct clknode *clk; in imx_clk_sscg_pll_register() local
185 if (clk == NULL) in imx_clk_sscg_pll_register()
188 sc = clknode_get_softc(clk); in imx_clk_sscg_pll_register()
[all …]
H A Dimx_clk_frac_pll.c81 clknode_init_parent_idx(clk, 0); in imx_clk_frac_pll_init()
92 sc = clknode_get_softc(clk); in imx_clk_frac_pll_set_gate()
94 DEVICE_LOCK(clk); in imx_clk_frac_pll_set_gate()
112 DEVICE_UNLOCK(clk); in imx_clk_frac_pll_set_gate()
124 sc = clknode_get_softc(clk); in imx_clk_frac_pll_recalc()
126 DEVICE_LOCK(clk); in imx_clk_frac_pll_recalc()
129 DEVICE_UNLOCK(clk); in imx_clk_frac_pll_recalc()
162 struct clknode *clk; in imx_clk_frac_pll_register() local
167 if (clk == NULL) in imx_clk_frac_pll_register()
170 sc = clknode_get_softc(clk); in imx_clk_frac_pll_register()
[all …]
H A Dimx_clk_mux.c83 sc = clknode_get_softc(clk); in imx_clk_mux_init()
85 DEVICE_LOCK(clk); in imx_clk_mux_init()
87 DEVICE_UNLOCK(clk); in imx_clk_mux_init()
103 sc = clknode_get_softc(clk); in imx_clk_mux_set_mux()
105 DEVICE_LOCK(clk); in imx_clk_mux_set_mux()
109 DEVICE_UNLOCK(clk); in imx_clk_mux_set_mux()
112 RD4(clk, sc->offset, &reg); in imx_clk_mux_set_mux()
113 DEVICE_UNLOCK(clk); in imx_clk_mux_set_mux()
121 struct clknode *clk; in imx_clk_mux_register() local
125 if (clk == NULL) in imx_clk_mux_register()
[all …]
H A Dimx_clk_gate.c75 clknode_init_parent_idx(clk, 0); in imx_clk_gate_init()
86 sc = clknode_get_softc(clk); in imx_clk_gate_set_gate()
87 DEVICE_LOCK(clk); in imx_clk_gate_set_gate()
88 rv = MD4(clk, sc->offset, sc->mask << sc->shift, in imx_clk_gate_set_gate()
91 DEVICE_UNLOCK(clk); in imx_clk_gate_set_gate()
94 RD4(clk, sc->offset, &reg); in imx_clk_gate_set_gate()
95 DEVICE_UNLOCK(clk); in imx_clk_gate_set_gate()
102 struct clknode *clk; in imx_clk_gate_register() local
106 if (clk == NULL) in imx_clk_gate_register()
109 sc = clknode_get_softc(clk); in imx_clk_gate_register()
[all …]
/f-stack/freebsd/arm/allwinner/clkng/
H A Daw_clk_m.c83 DEVICE_LOCK(clk); in aw_clk_m_init()
85 DEVICE_UNLOCK(clk); in aw_clk_m_init()
105 DEVICE_LOCK(clk); in aw_clk_m_set_gate()
112 DEVICE_UNLOCK(clk); in aw_clk_m_set_gate()
128 DEVICE_LOCK(clk); in aw_clk_m_set_mux()
133 DEVICE_UNLOCK(clk); in aw_clk_m_set_mux()
212 DEVICE_LOCK(clk); in aw_clk_m_set_freq()
220 DEVICE_UNLOCK(clk); in aw_clk_m_set_freq()
236 DEVICE_LOCK(clk); in aw_clk_m_recalc()
238 DEVICE_UNLOCK(clk); in aw_clk_m_recalc()
[all …]
H A Dccu_a31.c882 { .type = AW_CLK_NM, .clk.nm = &apb2_clk},
885 { .type = AW_CLK_NM, .clk.nm = &mmc0_clk},
886 { .type = AW_CLK_NM, .clk.nm = &mmc1_clk},
889 { .type = AW_CLK_NM, .clk.nm = &ts_clk},
890 { .type = AW_CLK_NM, .clk.nm = &ss_clk},
898 { .type = AW_CLK_NM, .clk.nm = &be0_clk},
899 { .type = AW_CLK_NM, .clk.nm = &be1_clk},
900 { .type = AW_CLK_NM, .clk.nm = &fe0_clk},
901 { .type = AW_CLK_NM, .clk.nm = &fe1_clk},
902 { .type = AW_CLK_NM, .clk.nm = &mp_clk},
[all …]
H A Daw_clk_nkmp.c88 DEVICE_LOCK(clk); in aw_clk_nkmp_init()
90 DEVICE_UNLOCK(clk); in aw_clk_nkmp_init()
110 DEVICE_LOCK(clk); in aw_clk_nkmp_set_gate()
117 DEVICE_UNLOCK(clk); in aw_clk_nkmp_set_gate()
133 DEVICE_LOCK(clk); in aw_clk_nkmp_set_mux()
138 DEVICE_UNLOCK(clk); in aw_clk_nkmp_set_mux()
201 DEVICE_LOCK(clk); in aw_clk_nkmp_set_freq_scale()
253 DEVICE_UNLOCK(clk); in aw_clk_nkmp_set_freq_scale()
290 DEVICE_LOCK(clk); in aw_clk_nkmp_set_freq()
337 DEVICE_LOCK(clk); in aw_clk_nkmp_recalc()
[all …]
H A Daw_clk_nm.c84 DEVICE_LOCK(clk); in aw_clk_nm_init()
86 DEVICE_UNLOCK(clk); in aw_clk_nm_init()
106 DEVICE_LOCK(clk); in aw_clk_nm_set_gate()
113 DEVICE_UNLOCK(clk); in aw_clk_nm_set_gate()
129 DEVICE_LOCK(clk); in aw_clk_nm_set_mux()
134 DEVICE_UNLOCK(clk); in aw_clk_nm_set_mux()
241 DEVICE_LOCK(clk); in aw_clk_nm_set_freq()
252 DEVICE_UNLOCK(clk); in aw_clk_nm_set_freq()
277 DEVICE_LOCK(clk); in aw_clk_nm_recalc()
279 DEVICE_UNLOCK(clk); in aw_clk_nm_recalc()
[all …]
H A Dccu_a64.c748 { .type = AW_CLK_NM, .clk.nm = &apb2_clk},
753 { .type = AW_CLK_NM, .clk.nm = &ts_clk},
754 { .type = AW_CLK_NM, .clk.nm = &ce_clk},
757 { .type = AW_CLK_M, .clk.m = &spdif_clk},
758 { .type = AW_CLK_M, .clk.m = &dram_clk},
759 { .type = AW_CLK_M, .clk.m = &de_clk},
760 { .type = AW_CLK_M, .clk.m = &tcon1_clk},
764 { .type = AW_CLK_M, .clk.m = &ve_clk},
765 { .type = AW_CLK_M, .clk.m = &hdmi_clk},
766 { .type = AW_CLK_M, .clk.m = &mbus_clk},
[all …]
/f-stack/freebsd/arm/ti/clk/
H A Dclock_common.c75 clk->clock_cells_ncells = malloc(clk->num_clock_cells*sizeof(uint8_t), in read_clock_cells()
80 clk->num_real_clocks = 0; in read_clock_cells()
90 clk->clock_cells_ncells[index] = ncells; in read_clock_cells()
92 clk->num_real_clocks++; in read_clock_cells()
110 index, clk->clock_cells[index]); in find_parent_clock_names()
112 index += clk->clock_cells_ncells[index]; in find_parent_clock_names()
120 clock_index, clk->num_real_clocks, in find_parent_clock_names()
124 index += clk->clock_cells_ncells[index]; in find_parent_clock_names()
131 free(clk->clock_cells, M_DEVBUF); in find_parent_clock_names()
132 free(clk->clock_cells_ncells, M_DEVBUF); in find_parent_clock_names()
[all …]
/f-stack/freebsd/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq.dtsi309 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
323 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
337 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
351 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
603 <&clk IMX8MQ_CLK_NOC>;
851 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
865 <&clk IMX8MQ_CLK_DUMMY>, <&clk IMX8MQ_CLK_DUMMY>;
1023 <&clk IMX8MQ_CLK_AHB>;
1098 <&clk IMX8MQ_CLK_32K>;
1130 <&clk IMX8MQ_CLK_32K>;
[all …]
H A Dimx8mm.dtsi64 clocks = <&clk IMX8MM_CLK_ARM>;
79 clocks = <&clk IMX8MM_CLK_ARM>;
279 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
293 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
307 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
321 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
335 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
524 <&clk IMX8MM_CLK_NOC>,
527 <&clk IMX8MM_SYS_PLL3>,
846 <&clk IMX8MM_CLK_AHB>;
[all …]
/f-stack/freebsd/arm/freescale/vybrid/
H A Dvf_ccm.c156 struct clk { struct
168 static struct clk ipg_clk = { argument
322 struct clk *clk; member
369 struct clk *clk; in set_clock() local
378 clk = clock_map[i].clk; in set_clock()
379 if (clk->sel_reg != 0) { in set_clock()
381 reg &= ~(clk->sel_mask << clk->sel_shift); in set_clock()
382 reg |= (clk->sel_val << clk->sel_shift); in set_clock()
387 reg |= clk->enable_reg; in set_clock()
388 reg &= ~(clk->div_mask << clk->div_shift); in set_clock()
[all …]

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