Searched refs:cfg2 (Results 1 – 2 of 2) sorted by relevance
133 uint32_t cfg0, cfg2; in imx_clk_sscg_pll_recalc() local140 READ4(clk, sc->offset + CFG2, &cfg2); in imx_clk_sscg_pll_recalc()147 divr1 = (cfg2 & CFG2_DIVR1_MASK) >> CFG2_DIVR1_SHIFT; in imx_clk_sscg_pll_recalc()148 divr2 = (cfg2 & CFG2_DIVR2_MASK) >> CFG2_DIVR2_SHIFT; in imx_clk_sscg_pll_recalc()149 divf1 = (cfg2 & CFG2_DIVF1_MASK) >> CFG2_DIVF1_SHIFT; in imx_clk_sscg_pll_recalc()150 divf2 = (cfg2 & CFG2_DIVF2_MASK) >> CFG2_DIVF2_SHIFT; in imx_clk_sscg_pll_recalc()151 div = (cfg2 & CFG2_DIV_MASK) >> CFG2_DIV_SHIFT; in imx_clk_sscg_pll_recalc()
102 u_int32_t cfg2; in mips_get_identity() local132 cfg2 = 0; in mips_get_identity()135 cfg2 = mips_rd_config2(); in mips_get_identity()136 if (cfg2 & MIPS_CONFIG2_M) in mips_get_identity()261 cfg2 = mips_rd_config2(); in mips_get_identity()263 tmp = (cfg2 >> MIPS_CONFIG2_SL_SHIFT) & MIPS_CONFIG2_SL_MASK; in mips_get_identity()267 tmp = (cfg2 >> MIPS_CONFIG2_SS_SHIFT) & MIPS_CONFIG2_SS_MASK; in mips_get_identity()299 uint32_t cfg0, cfg1, cfg2, cfg3; in cpu_identify() local449 cfg2 = mips_rd_config2(); in cpu_identify()454 printf(" Config2=0x%08x\n", cfg2); in cpu_identify()[all …]