| /f-stack/freebsd/contrib/device-tree/src/arm64/amazon/ |
| H A D | alpine-v3.dtsi | 30 d-cache-sets = <256>;
33 i-cache-sets = <256>;
44 d-cache-sets = <256>;
47 i-cache-sets = <256>;
58 d-cache-sets = <256>;
61 i-cache-sets = <256>;
72 d-cache-sets = <256>;
252 cache-level = <2>;
260 cache-level = <2>;
268 cache-level = <2>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | l2cache.txt | 9 "fsl,8540-l2-cache-controller"
10 "fsl,8541-l2-cache-controller"
11 "fsl,8544-l2-cache-controller"
12 "fsl,8548-l2-cache-controller"
13 "fsl,8555-l2-cache-controller"
14 "fsl,8568-l2-cache-controller"
19 "fsl,c293-l2-cache-controller"
47 and "cache".
49 - cache-size : Size of the entire L2 cache
51 - cache-line-size : Size of L2 cache lines
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-am654.dtsi | 43 i-cache-sets = <256>;
46 d-cache-sets = <128>;
57 i-cache-sets = <256>;
60 d-cache-sets = <128>;
94 compatible = "cache";
95 cache-level = <2>;
98 cache-sets = <512>;
103 compatible = "cache";
104 cache-level = <2>;
107 cache-sets = <512>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/socionext/ |
| H A D | socionext,uniphier-system-cache.yaml | 36 cache-unified: true
38 cache-size: true
40 cache-sets: true
44 cache-level:
59 - cache-unified
60 - cache-size
61 - cache-sets
62 - cache-line-size
63 - cache-level
72 cache-unified;
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-ap807-quad.dtsi | 25 i-cache-size = <0xc000>;
27 i-cache-sets = <256>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
57 i-cache-sets = <256>;
60 d-cache-sets = <256>;
72 i-cache-sets = <256>;
75 d-cache-sets = <256>;
83 cache-sets = <512>;
[all …]
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| H A D | armada-ap806-quad.dtsi | 25 i-cache-size = <0xc000>;
27 i-cache-sets = <256>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
57 i-cache-sets = <256>;
60 d-cache-sets = <256>;
72 i-cache-sets = <256>;
75 d-cache-sets = <256>;
83 cache-sets = <512>;
[all …]
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| H A D | armada-ap806-dual.dtsi | 25 i-cache-size = <0xc000>;
27 i-cache-sets = <256>;
28 d-cache-size = <0x8000>;
30 d-cache-sets = <256>;
42 i-cache-sets = <256>;
45 d-cache-sets = <256>;
49 l2: l2-cache {
50 compatible = "cache";
51 cache-size = <0x80000>;
52 cache-line-size = <64>;
[all …]
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| /f-stack/app/micro_thread/ |
| H A D | mt_cache.cpp | 168 cache->len = 0; in rw_cache_init()
169 cache->count = 0; in rw_cache_init()
170 cache->pool = pool; in rw_cache_init()
175 if ((cache == NULL) || (cache->pool == NULL)) { in rw_cache_destroy()
186 cache->count = 0; in rw_cache_destroy()
187 cache->len = 0; in rw_cache_destroy()
188 cache->pool = NULL; in rw_cache_destroy()
193 if ((cache == NULL) || (cache->pool == NULL)) { in cache_copy_out()
257 cache->count++; in cache_append_buffer()
284 if ((NULL == data) || (NULL == cache) || (NULL == cache->pool)) in cache_append_data()
[all …]
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| /f-stack/freebsd/contrib/openzfs/module/os/freebsd/spl/ |
| H A D | spl_kmem.c | 147 return (cache->kc_constructor(mem, cache->kc_private, flags)); in kmem_std_constructor()
155 cache->kc_destructor(mem, cache->kc_private); in kmem_std_destructor()
167 cache = kmem_alloc(sizeof (*cache), KM_SLEEP); in kmem_cache_create()
168 strlcpy(cache->kc_name, name, sizeof (cache->kc_name)); in kmem_cache_create()
173 cache->kc_zone = uma_zcreate(cache->kc_name, bufsize, in kmem_cache_create()
181 return (cache); in kmem_cache_create()
190 kmem_free(cache, sizeof (*cache)); in kmem_cache_destroy()
197 return (uma_zalloc_arg(cache->kc_zone, cache, flags)); in kmem_cache_alloc()
203 kmem_std_constructor(p, cache->kc_size, cache, flags); in kmem_cache_alloc()
212 uma_zfree_arg(cache->kc_zone, buf, cache); in kmem_cache_free()
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/arm/ |
| H A D | juno-r1.dts | 94 i-cache-sets = <256>;
97 d-cache-sets = <256>;
111 i-cache-sets = <256>;
114 d-cache-sets = <256>;
128 i-cache-sets = <256>;
131 d-cache-sets = <128>;
145 i-cache-sets = <256>;
148 d-cache-sets = <128>;
162 i-cache-sets = <256>;
193 cache-sets = <2048>;
[all …]
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| H A D | juno.dts | 93 i-cache-sets = <256>;
96 d-cache-sets = <256>;
111 i-cache-sets = <256>;
114 d-cache-sets = <256>;
129 i-cache-sets = <256>;
132 d-cache-sets = <128>;
147 i-cache-sets = <256>;
150 d-cache-sets = <128>;
165 i-cache-sets = <256>;
198 cache-sets = <2048>;
[all …]
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| H A D | juno-r2.dts | 94 i-cache-sets = <256>;
97 d-cache-sets = <256>;
112 i-cache-sets = <256>;
115 d-cache-sets = <256>;
130 i-cache-sets = <256>;
133 d-cache-sets = <128>;
148 i-cache-sets = <256>;
151 d-cache-sets = <128>;
166 i-cache-sets = <256>;
199 cache-sets = <2048>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/riscv/ |
| H A D | sifive-l2-cache.txt | 12 - cache-block-size: Specifies the block size in bytes of the cache.
15 - cache-level: Should be set to 2 for a level 2 cache
17 - cache-sets: Specifies the number of associativity sets of the cache.
20 - cache-size: Specifies the size in bytes of the cache. Should be 2097152
22 - cache-unified: Specifies the cache is a unified cache
30 - next-level-cache: phandle to the next level cache if present.
41 cache-block-size = <64>;
42 cache-level = <2>;
43 cache-sets = <1024>;
44 cache-size = <2097152>;
[all …]
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| /f-stack/app/nginx-1.16.1/src/http/ |
| H A D | ngx_http_file_cache.c | 118 cache->max_size /= cache->bsize; in ngx_http_file_cache_init()
120 if (!cache->sh->cold || cache->sh->loading) { in ngx_http_file_cache_init()
130 cache->sh = cache->shpool->data; in ngx_http_file_cache_init()
132 cache->max_size /= cache->bsize; in ngx_http_file_cache_init()
142 cache->shpool->data = cache->sh; in ngx_http_file_cache_init()
157 cache->max_size /= cache->bsize; in ngx_http_file_cache_init()
2039 if (!cache->sh->cold || cache->sh->loading) { in ngx_http_file_cache_loader()
2097 if (++cache->files >= cache->loader_files) { in ngx_http_file_cache_manage_file()
2269 cache->sh->watermark = cache->sh->count - cache->sh->count / 8; in ngx_http_file_cache_set_watermark()
2577 cache->path->data = cache; in ngx_http_file_cache_set_slot()
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-qcom-hw.txt | 60 L2_0: l2-cache {
61 compatible = "cache";
63 L3_0: l3-cache {
76 L2_100: l2-cache {
77 compatible = "cache";
89 L2_200: l2-cache {
102 L2_300: l2-cache {
115 L2_400: l2-cache {
128 L2_500: l2-cache {
141 L2_600: l2-cache {
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/freescale/ |
| H A D | fsl-lx2160a.dtsi | 36 d-cache-sets = <128>;
39 i-cache-sets = <192>;
53 d-cache-sets = <128>;
56 i-cache-sets = <192>;
70 d-cache-sets = <128>;
73 i-cache-sets = <192>;
305 cache-level = <2>;
313 cache-level = <2>;
321 cache-level = <2>;
329 cache-level = <2>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/nds32/ |
| H A D | atl2c.txt | 1 * Andestech L2 cache Controller
3 The level-2 cache controller plays an important role in reducing memory latency
5 Level-2 cache controller in general enhances overall system performance
10 representation of an Andestech L2 cache controller.
17 - reg : Physical base address and size of cache controller's memory mapped
18 - cache-unified : Specifies the cache is a unified cache.
19 - cache-level : Should be set to 2 for a level 2 cache.
23 cache-controller@e0500000 {
26 cache-unified;
27 cache-level = <2>;
|
| /f-stack/dpdk/lib/librte_mempool/ |
| H A D | rte_mempool.h | 1265 if (cache == NULL || cache->len == 0) in rte_mempool_cache_flush()
1268 rte_mempool_ops_enqueue_bulk(mp, cache->objs, cache->len); in rte_mempool_cache_flush()
1269 cache->len = 0; in rte_mempool_cache_flush()
1297 cache_objs = &cache->objs[cache->len]; in __mempool_generic_put()
1311 if (cache->len >= cache->flushthresh) { in __mempool_generic_put()
1312 rte_mempool_ops_enqueue_bulk(mp, &cache->objs[cache->size], in __mempool_generic_put()
1313 cache->len - cache->size); in __mempool_generic_put()
1314 cache->len = cache->size; in __mempool_generic_put()
1417 if (unlikely(cache == NULL || n >= cache->size)) in __mempool_generic_get()
1425 uint32_t req = n + (cache->size - cache->len); in __mempool_generic_get()
[all …]
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| H A D | rte_mempool_trace_fp.h | 50 uint32_t nb_objs, void *cache),
54 rte_trace_point_emit_ptr(cache);
60 uint32_t nb_objs, void *cache),
64 rte_trace_point_emit_ptr(cache);
70 uint32_t nb_objs, void *cache),
74 rte_trace_point_emit_ptr(cache);
80 uint32_t nb_objs, void *cache),
84 rte_trace_point_emit_ptr(cache);
107 RTE_TRACE_POINT_ARGS(void *cache, void *mempool),
108 rte_trace_point_emit_ptr(cache);
|
| /f-stack/freebsd/contrib/device-tree/src/riscv/sifive/ |
| H A D | fu540-c000.dtsi | 29 i-cache-sets = <128>;
30 i-cache-size = <16384>;
43 d-cache-sets = <64>;
49 i-cache-sets = <64>;
67 d-cache-sets = <64>;
73 i-cache-sets = <64>;
91 d-cache-sets = <64>;
97 i-cache-sets = <64>;
115 d-cache-sets = <64>;
263 cache-level = <2>;
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/ |
| H A D | l2c2x0.yaml | 35 - arm,l220-cache
36 - arm,l210-cache
57 cache-level:
60 cache-unified: true
61 cache-size: true
62 cache-sets: true
63 cache-block-size: true
64 cache-line-size: true
118 cache-id-part:
224 - cache-unified
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/arm64/qcom/ |
| H A D | sdm660.dtsi | 45 L2_1: l2-cache {
46 compatible = "cache";
47 cache-level = <2>;
50 compatible = "cache";
53 compatible = "cache";
65 compatible = "cache";
68 compatible = "cache";
80 compatible = "cache";
83 compatible = "cache";
109 L2_0: l2-cache {
[all …]
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| /f-stack/freebsd/contrib/device-tree/src/powerpc/fsl/ |
| H A D | p4080si-pre.dtsi | 98 next-level-cache = <&L2_0>;
100 L2_0: l2-cache {
101 next-level-cache = <&cpc>;
108 next-level-cache = <&L2_1>;
110 L2_1: l2-cache {
120 L2_2: l2-cache {
130 L2_3: l2-cache {
140 L2_4: l2-cache {
150 L2_5: l2-cache {
160 L2_6: l2-cache {
[all …]
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| /f-stack/app/nginx-1.16.1/src/core/ |
| H A D | ngx_open_file_cache.c | 63 if (cache == NULL) { in ngx_open_file_cache_init()
67 ngx_rbtree_init(&cache->rbtree, &cache->sentinel, in ngx_open_file_cache_init()
72 cache->current = 0; in ngx_open_file_cache_init()
73 cache->max = max; in ngx_open_file_cache_init()
82 cln->data = cache; in ngx_open_file_cache_init()
84 return cache; in ngx_open_file_cache_init()
135 if (cache->rbtree.root != cache->rbtree.sentinel) { in ngx_open_file_cache_cleanup()
362 if (cache->current >= cache->max) { in ngx_open_cached_file()
386 cache->current++; in ngx_open_cached_file()
442 ofcln->cache = cache; in ngx_open_cached_file()
[all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/mrvl/ |
| H A D | feroceon.txt | 4 - compatible : Should be either "marvell,feroceon-cache" or
5 "marvell,kirkwood-cache".
8 - reg : Address of the L2 cache control register. Mandatory for
9 "marvell,kirkwood-cache", not used by "marvell,feroceon-cache"
13 l2: l2-cache@20128 {
14 compatible = "marvell,kirkwood-cache";
|