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Searched refs:bus_clk_rate (Results 1 – 2 of 2) sorted by relevance

/f-stack/dpdk/drivers/raw/ifpga/base/
H A Dopae_i2c.c433 u32 divisor = dev->i2c_clk / dev->bus_clk_rate; in altera_i2c_hardware_init()
439 if (dev->bus_clk_rate <= 100000) { in altera_i2c_hardware_init()
454 __func__, dev->bus_clk_rate, clk_mhz, divisor); in altera_i2c_hardware_init()
488 dev->bus_clk_rate = 100000; in altera_i2c_probe()
491 dev->bus_clk_rate = 400000; in altera_i2c_probe()
H A Dopae_i2c.h88 u32 bus_clk_rate; /* i2c bus clock */ member