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/f-stack/dpdk/lib/librte_eal/common/
H A Deal_common_bus.c22 RTE_VERIFY(bus); in rte_bus_register()
23 RTE_VERIFY(bus->name && strlen(bus->name)); in rte_bus_register()
29 RTE_VERIFY(!bus->plug || bus->unplug); in rte_bus_register()
53 bus->name); in rte_bus_scan()
68 vbus = bus; in rte_bus_probe()
75 bus->name); in rte_bus_probe()
133 bus = TAILQ_NEXT(bus, next); in rte_bus_find()
135 return bus; in rte_bus_find()
180 return !(bus->parse && bus->parse(name, NULL) == 0); in bus_can_parse()
216 bus->name, in rte_bus_get_iommu_class()
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H A Deal_common_devargs.c145 devargs->bus = bus; in rte_devargs_layers_parse()
174 return strncmp(bus->name, name, strlen(bus->name)); in bus_name_cmp()
191 bus = rte_bus_find(bus, bus_name_cmp, dev); in rte_devargs_parse()
192 if (bus == NULL) in rte_devargs_parse()
211 if (bus == NULL) { in rte_devargs_parse()
219 da->bus = bus; in rte_devargs_parse()
276 if (strcmp(listed_da->bus->name, (*da)->bus->name) == 0 && in rte_devargs_insert()
283 listed_da->bus = (*da)->bus; in rte_devargs_insert()
315 bus = devargs->bus; in rte_devargs_add()
346 if (strcmp(d->bus->name, devargs->bus->name) == 0 && in rte_devargs_remove()
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H A Deal_common_dev.c148 da->bus->name); in local_dev_probe()
292 struct rte_bus *bus; in rte_eal_hotplug_remove() local
295 if (bus == NULL) { in rte_eal_hotplug_remove()
317 dev->bus->name); in local_dev_remove()
593 bus = devargs.bus; in rte_dev_iterator_init()
604 if (bus != NULL && bus->dev_iterate == NULL) { in rte_dev_iterator_init()
617 it->bus = bus; in rte_dev_iterator_init()
695 if (it->bus_str != NULL && bus != it->bus) in bus_next_dev_cmp()
741 bus = TAILQ_PREV(it->bus, rte_bus_list, next); in rte_dev_iterator_next()
752 while ((bus = rte_bus_find(bus, bus_next_dev_cmp, in rte_dev_iterator_next()
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/f-stack/freebsd/amd64/pci/
H A Dpci_cfgreg.c86 (bus >= pcie_minbus && bus <= pcie_maxbus) && in pci_docfgregread()
87 (bus != 0 || !(1 << slot & pcie_badslots))) in pci_docfgregread()
126 (bus >= pcie_minbus && bus <= pcie_maxbus) && in pci_cfgregwrite()
127 (bus != 0 || !(1 << slot & pcie_badslots))) in pci_cfgregwrite()
171 port = pci_cfgenable(bus, slot, func, reg, bytes); in pcireg_cfgread()
257 #define PCIE_VADDR(base, reg, bus, slot, func) \ argument
259 ((((bus) & 0xff) << 20) | \
279 if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || in pciereg_cfgread()
283 va = PCIE_VADDR(pcie_base, reg, bus, slot, func); in pciereg_cfgread()
309 if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || in pciereg_cfgwrite()
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/f-stack/freebsd/mips/nlm/dev/net/
H A Dmdio.c64 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4))); in nlm_int_gmac_mdio_read()
67 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)), in nlm_int_gmac_mdio_read()
72 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), in nlm_int_gmac_mdio_read()
77 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), in nlm_int_gmac_mdio_read()
87 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus * 4)), in nlm_int_gmac_mdio_read()
117 NAE_REG(block, intf_type, (INT_MDIO_CTRL + bus*4)), in nlm_int_gmac_mdio_write()
180 nlm_gmac_mdio_read(uint64_t nae_base, int bus, int block, in nlm_gmac_mdio_read() argument
187 (EXT_G0_MDIO_CTRL + bus * 4))); in nlm_gmac_mdio_read()
194 (EXT_G0_MDIO_RD_STAT + bus * 4))) & in nlm_gmac_mdio_read()
248 (EXT_G0_MDIO_CTRL + bus * 4))); in nlm_gmac_mdio_write()
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/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dibm-power9-dual.dtsi22 cfam0_i2c0: i2c-bus@0 {
26 cfam0_i2c1: i2c-bus@1 {
30 cfam0_i2c2: i2c-bus@2 {
34 cfam0_i2c3: i2c-bus@3 {
38 cfam0_i2c4: i2c-bus@4 {
42 cfam0_i2c5: i2c-bus@5 {
46 cfam0_i2c6: i2c-bus@6 {
50 cfam0_i2c7: i2c-bus@7 {
54 cfam0_i2c8: i2c-bus@8 {
58 cfam0_i2c9: i2c-bus@9 {
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/f-stack/freebsd/x86/pci/
H A Dpci_bus.c101 device_t bus; in legacy_pcib_alloc_msi() local
111 device_t bus; in legacy_pcib_alloc_msix() local
121 device_t bus, hostb; in legacy_pcib_map_msi() local
156 *busnum = bus; in legacy_pcib_is_host_bridge()
380 int bus, slot, func; in legacy_pcib_identify() local
400 bus = 0; in legacy_pcib_identify()
481 bus++; in legacy_pcib_identify()
514 int bus; in legacy_pcib_attach() local
516 bus = pcib_get_bus(dev); in legacy_pcib_attach()
751 int bus; in pcibios_pcib_probe() local
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H A Dpci_early_quirks.c64 intel_stolen_base_gen3(int bus, int slot, int func) in intel_stolen_base_gen3() argument
69 ctrl = pci_cfgregread(bus, slot, func, INTEL_BSM, 4); in intel_stolen_base_gen3()
75 intel_stolen_size_gen3(int bus, int slot, int func) in intel_stolen_size_gen3() argument
115 intel_stolen_size_gen6(int bus, int slot, int func) in intel_stolen_size_gen6() argument
120 ctrl = pci_cfgregread(bus, slot, func, SNB_GMCH_CTRL, 2); in intel_stolen_size_gen6()
126 intel_stolen_size_gen8(int bus, int slot, int func) in intel_stolen_size_gen8() argument
137 intel_stolen_size_chv(int bus, int slot, int func) in intel_stolen_size_chv() argument
159 intel_stolen_size_gen9(int bus, int slot, int func) in intel_stolen_size_gen9() argument
175 vm_paddr_t (*base)(int bus, int slot, int func);
176 vm_paddr_t (*size)(int bus, int slot, int func);
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H A Dqpi.c103 qpi_probe_pcib(device_t dev, int bus) in qpi_probe_pcib() argument
114 if (pci_find_bsf(bus, 0, 0) != NULL) in qpi_probe_pcib()
134 bus, s, devid & 0xffff); in qpi_probe_pcib()
141 bus); in qpi_probe_pcib()
143 qdev->qd_pcibus = bus; in qpi_probe_pcib()
151 int bus; in qpi_attach() local
158 for (bus = PCI_BUSMAX; bus >= 0; bus--) in qpi_attach()
159 qpi_probe_pcib(dev, bus); in qpi_attach()
165 qpi_print_child(device_t bus, device_t child) in qpi_print_child() argument
272 device_t bus; in qpi_pcib_map_msi() local
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/f-stack/freebsd/i386/pci/
H A Dpci_cfgreg.c160 (bus >= pcie_minbus && bus <= pcie_maxbus) && in pci_docfgregread()
161 (bus != 0 || !(1 << slot & pcie_badslots))) in pci_docfgregread()
195 (bus >= pcie_minbus && bus <= pcie_maxbus) && in pci_cfgregwrite()
212 if (bus <= PCI_BUSMAX in pci_cfgenable()
223 | (bus << 16) | (slot << 11) in pci_cfgenable()
229 outb(CONF2_FORWARD_PORT, bus); in pci_cfgenable()
522 ((((bus) & 0xff) << 20) | \
581 if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || in pciereg_cfgread()
586 va = pciereg_findaddr(bus, slot, func, reg); in pciereg_cfgread()
613 if (bus < pcie_minbus || bus > pcie_maxbus || slot > PCI_SLOTMAX || in pciereg_cfgwrite()
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H A Dpci_pir.c69 int bus; member
76 int bus; member
191 if (entry->pe_bus == lookup->bus && in pci_pir_find_link_handler()
299 bus, device, pin + 'A', func, value); in pci_pir_search_irq()
499 lookup.bus = bus; in pci_pir_route_interrupt()
534 bus, device, pin - 1 + 'A'); in pci_pir_route_interrupt()
640 pci_pir_probe(int bus, int require_parse) in pci_pir_probe() argument
686 pd->bus = entry->pe_bus; in pir_resume_find_device()
707 pd.bus = -1; in pir_resume()
710 KASSERT(pd.bus != -1, in pir_resume()
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/f-stack/freebsd/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433-bus.dtsi11 compatible = "samsung,exynos-bus";
13 clock-names = "bus";
21 clock-names = "bus";
29 clock-names = "bus";
37 clock-names = "bus";
45 clock-names = "bus";
53 clock-names = "bus";
61 clock-names = "bus";
69 clock-names = "bus";
77 clock-names = "bus";
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/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dsimple-pm-bus.yaml4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
21 While "simple-pm-bus" follows the "simple-bus" set of properties, as
23 "simple-bus".
27 pattern: "^bus(@[0-9a-f]+)?$"
31 const: simple-pm-bus
33 Shall contain "simple-pm-bus" in addition to a optional bus-specific
34 compatible strings defined in individual pm-bus bindings.
69 bus {
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H A Dsocionext,uniphier-system-bus.yaml4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
14 Before any access to the bus, the bus controller must be configured; the bus
18 be optimized for faster bus access.
25 const: socionext,uniphier-system-bus
41 Provide address translation from the System Bus to the parent bus.
71 // mapped to 0x43f00000 of the parent bus.
73 // mapped to 0x46200000 of the parent bus.
75 system-bus@58c00000 {
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/f-stack/freebsd/contrib/device-tree/Bindings/devfreq/
H A Dexynos-bus.txt7 of the bus in runtime. To monitor the usage of each bus in runtime,
16 - parent bus device
17 - passive bus device
21 and the rest bus devices (passive bus device) depend on the decision of
37 - clock-names : the name of clock used by the bus, "bus".
194 clock-names = "bus";
228 clock-names = "bus";
236 clock-names = "bus";
244 clock-names = "bus";
252 clock-names = "bus";
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/f-stack/freebsd/contrib/device-tree/Bindings/arm/omap/
H A Dl4.txt3 These bindings describe the OMAP SoCs L4 interconnect bus.
6 - compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus
7 Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus
8 Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus
9 Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus
10 Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus
12 Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus
14 Should be "ti,dra7-l4-cfg" for DRA7 family l4 cfg bus
15 Should be "ti,dra7-l4-wkup" for DRA7 family l4 wkup bus
18 - ranges : contains the IO map range for the bus
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/f-stack/freebsd/contrib/device-tree/Bindings/i2c/
H A Di2c-aspeed.txt6 - reg : address offset and range of bus
7 - compatible : should be "aspeed,ast2400-i2c-bus"
8 or "aspeed,ast2500-i2c-bus"
9 or "aspeed,ast2600-i2c-bus"
10 - clocks : root clock of bus, should reference the APB
17 - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not
19 - multi-master : states that there is another master active on this bus.
24 compatible = "simple-bus";
37 i2c0: i2c-bus@40 {
42 compatible = "aspeed,ast2400-i2c-bus";
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H A Di2c-mux-pinctrl.txt3 This binding describes an I2C bus multiplexer that uses pin multiplexing to
12 | +---+ +------+ | child bus A, on first set of pins
14 | +---+ +------+ | child bus B, on second set of pins
23 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
29 bus. See ../pinctrl/pinctrl-bindings.txt.
33 * I2C child bus nodes. See i2c-mux.txt in this directory.
35 For each named state defined in the pinctrl-names property, an I2C child bus
36 will be created. I2C child bus numbers are assigned based on the index into
43 pinctrl-names = "ddc", "pta", "idle" -> ddc = bus 0, pta = bus 1
51 on a child bus, the idle pinctrl state will be programmed into hardware.
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/f-stack/freebsd/mips/atheros/
H A Dar71xx_pci.c185 ar71xx_pci_make_addr(int bus, int slot, int func, int reg) in ar71xx_pci_make_addr() argument
187 if (bus == 0) { in ar71xx_pci_make_addr()
190 return ((bus << 16) | (slot << 11) | (func << 8) in ar71xx_pci_make_addr()
208 bus, slot, func, reg, bytes, addr, cmd); in ar71xx_pci_conf_setup()
235 if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, in ar71xx_pci_read_config()
276 if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes, in ar71xx_pci_write_config()
347 bus, slot, func); in ar71xx_pci_slot_fixup()
352 bus, slot, func); in ar71xx_pci_slot_fixup()
362 flash_addr, bus, slot, func); in ar71xx_pci_slot_fixup()
506 struct ar71xx_pci_softc *sc = device_get_softc(bus); in ar71xx_pci_alloc_resource()
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/f-stack/freebsd/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,aips-bus.yaml4 $id: http://devicetree.org/schemas/soc/imx/fsl,aips-bus.yaml#
14 AHB bus and peripherals with the lower bandwidth IP Slave (IPS)
21 const: fsl,aips-bus
28 - const: fsl,aips-bus
29 - const: simple-bus
40 bus@30000000 {
41 compatible = "fsl,aips-bus", "simple-bus";
/f-stack/freebsd/contrib/device-tree/Bindings/display/
H A Dmipi-dsi-bus.txt4 The MIPI Display Serial Interface specifies a serial bus and a protocol for
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
13 peripherals on that bus.
42 Peripherals with DSI as control bus, or no control bus
45 Peripherals with the DSI bus as the primary control bus, or peripherals with
46 no control bus but use the DSI bus to transmit pixel data are represented
64 Peripherals with a different control bus
68 primary control bus, but are also connected to a DSI bus (mostly for the data
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/f-stack/freebsd/arm/annapurna/alpine/
H A Dalpine_pci.c125 int bus, slot, func, maxfunc; in al_pcib_fixup() local
128 bus = 0; in al_pcib_fixup()
132 hdrtype = PCIB_READ_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
141 vid = PCIB_READ_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
144 val = PCIB_READ_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
147 PCIB_WRITE_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
150 val = PCIB_READ_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
154 PCIB_WRITE_CONFIG(dev, bus, slot, func, in al_pcib_fixup()
/f-stack/freebsd/amd64/vmm/io/
H A Dppt.h35 int ppt_map_mmio(struct vm *vm, int bus, int slot, int func,
37 int ppt_setup_msi(struct vm *vm, int vcpu, int bus, int slot, int func,
39 int ppt_setup_msix(struct vm *vm, int vcpu, int bus, int slot, int func,
41 int ppt_disable_msix(struct vm *vm, int bus, int slot, int func);
55 int ppt_assign_device(struct vm *vm, int bus, int slot, int func);
56 int ppt_unassign_device(struct vm *vm, int bus, int slot, int func);
/f-stack/freebsd/arm/mv/
H A Dmv_pci.c262 #define PCI_CFG_BUS(bus) (((bus) & 0xff) << 16) argument
445 int err, bus, devfn, port_id; in mv_pcib_attach() local
531 for (bus = 0; bus < PCI_BUSMAX; bus++) { in mv_pcib_attach()
537 sc->sc_busnr = bus; /* update bus number */ in mv_pcib_attach()
751 bus, slot, func, reg, bar, addr); in mv_pcib_init_bar()
827 mv_pcib_write_config(sc->sc_dev, bus, slot, func, in mv_pcib_init()
830 error = mv_pcib_init_all_bars(sc, bus, slot, func, in mv_pcib_init()
838 mv_pcib_write_config(sc->sc_dev, bus, slot, func, in mv_pcib_init()
851 mv_pcib_init_bridge(sc, bus, slot, func); in mv_pcib_init()
872 i = mv_pcib_init_bar(sc, bus, slot, func, bar); in mv_pcib_init_all_bars()
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/f-stack/freebsd/contrib/device-tree/Bindings/misc/
H A Difm-csi.txt1 IFM camera sensor interface on mpc5200 LocalPlus bus
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
18 the bus will be enabled.
32 ifm,csi-addr-bus-width = <24>;
33 ifm,csi-data-bus-width = <8>;

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