Searched refs:bitfield (Results 1 – 15 of 15) sorted by relevance
| /f-stack/app/redis-5.0.5/tests/unit/ |
| H A D | bitfield.tcl | 7 lappend results [r bitfield bits get i8 0] 23 r bitfield bits set u8 #0 65 24 r bitfield bits set u8 #1 66 25 r bitfield bits set u8 #2 67 32 r bitfield bits set u8 #0 10 41 r bitfield bits set u8 #0 10 49 r bitfield bits set u8 #0 100 59 r bitfield bits set u8 #0 100 69 r bitfield bits set i8 #0 100 79 r bitfield bits set u8 #0 100 [all …]
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| /f-stack/freebsd/contrib/device-tree/Bindings/mux/ |
| H A D | reg-mux.txt | 1 Generic register bitfield-based multiplexer controller bindings 11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask 20 bitfield described by the corresponding register offset and bitfield mask
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| /f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | renesas,intc-irqpin.yaml | 41 sense-bitfield-width: 46 Width of a single sense bitfield in the SENSE register, if different from the
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| /f-stack/freebsd/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/ |
| H A D | firmware.txt | 13 - extended-modes: The Extended Modes bitfield, taken from the
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| /f-stack/freebsd/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-thunderx.txt | 8 - Second cell is a standard generic flag bitfield as described in gpio.txt.
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| H A D | gpio.txt | 46 Most controllers are specifying a generic flag bitfield in the last cell, so 59 Optional standard bitfield specifiers for the last cell:
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| /f-stack/freebsd/contrib/device-tree/Bindings/spi/ |
| H A D | efm32-spi.txt | 14 bitfield to configure the pinmux for the device, see
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| /f-stack/freebsd/contrib/device-tree/Bindings/c6x/ |
| H A D | dscr.txt | 66 more devices (one bitfield per device). The layout of each tuple is: 83 bitfield per device). The layout of each tuple is:
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| /f-stack/freebsd/contrib/device-tree/Bindings/dma/ |
| H A D | st,stm32-dma.yaml | 33 4. A 32bit bitfield value specifying DMA features which are device dependent:
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| /f-stack/freebsd/contrib/device-tree/Bindings/arm/ |
| H A D | cpus.yaml | 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
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| /f-stack/freebsd/contrib/device-tree/src/arm/ |
| H A D | r8a7778.dtsi | 87 sense-bitfield-width = <2>;
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| H A D | r8a7779.dtsi | 179 sense-bitfield-width = <2>;
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| /f-stack/dpdk/drivers/net/qede/ |
| H A D | qede_rxtx.c | 1501 uint8_t bitfield) in print_rx_bd_info() argument 1507 m->data_len, bitfield, m->hash.rss, in print_rx_bd_info()
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| /f-stack/freebsd/contrib/zstd/doc/ |
| H A D | zstd_compression_format.md | 448 It's a byte-aligned variable-size bitfield, ranging from 1 to 5 bytes,
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| /f-stack/freebsd/contrib/dev/acpica/ |
| H A D | changes.txt | 5969 change the bitfield ordering based on the machine type. The new ACPICA 11464 Fixed three instances of the use of the C shift operator in the bitfield 13002 bitfield 17579 Split the common read/write low-level ACPI register bitfield
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