Home
last modified time | relevance | path

Searched refs:bar_addr (Results 1 – 12 of 12) sorted by relevance

/f-stack/dpdk/drivers/crypto/nitrox/
H A Dnitrox_hal.c19 nps_pkt_input_ring_disable(uint8_t *bar_addr, uint16_t ring) in nps_pkt_input_ring_disable() argument
48 pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); in nps_pkt_solicited_port_disable()
50 nitrox_write_csr(bar_addr, reg_addr, pkt_slc_ctl.u64); in nps_pkt_solicited_port_disable()
53 pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); in nps_pkt_solicited_port_disable()
56 pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); in nps_pkt_solicited_port_disable()
71 nps_pkt_input_ring_disable(bar_addr, ring); in setup_nps_pkt_input_ring()
76 nitrox_write_csr(bar_addr, reg_addr, base_addr); in setup_nps_pkt_input_ring()
101 nitrox_write_csr(bar_addr, reg_addr, 0xFFFFFFFF); in setup_nps_pkt_input_ring()
131 nps_pkt_solicited_port_disable(bar_addr, port); in setup_nps_pkt_solicit_output_port()
168 vf_get_vf_config_mode(uint8_t *bar_addr) in vf_get_vf_config_mode() argument
[all …]
H A Dnitrox_qp.c16 nitrox_setup_cmdq(struct nitrox_qp *qp, uint8_t *bar_addr, in nitrox_setup_cmdq() argument
37 qp->cmdq.dbell_csr_addr = NITROX_CSR_ADDR(bar_addr, offset); in nitrox_setup_cmdq()
40 setup_nps_pkt_input_ring(bar_addr, qp->qno, qp->count, mz->iova); in nitrox_setup_cmdq()
41 setup_nps_pkt_solicit_output_port(bar_addr, qp->qno); in nitrox_setup_cmdq()
63 nitrox_release_cmdq(struct nitrox_qp *qp, uint8_t *bar_addr) in nitrox_release_cmdq() argument
65 nps_pkt_solicited_port_disable(bar_addr, qp->qno); in nitrox_release_cmdq()
66 nps_pkt_input_ring_disable(bar_addr, qp->qno); in nitrox_release_cmdq()
89 err = nitrox_setup_cmdq(qp, bar_addr, dev_name, instr_size, socket_id); in nitrox_qp_setup()
100 nitrox_release_cmdq(qp, bar_addr); in nitrox_qp_setup()
111 nitrox_qp_release(struct nitrox_qp *qp, uint8_t *bar_addr) in nitrox_qp_release() argument
[all …]
H A Dnitrox_csr.h12 #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset)) argument
29 nitrox_read_csr(uint8_t *bar_addr, uint64_t offset) in nitrox_read_csr() argument
31 return rte_read64(bar_addr + offset); in nitrox_read_csr()
35 nitrox_write_csr(uint8_t *bar_addr, uint64_t offset, uint64_t value) in nitrox_write_csr() argument
37 rte_write64(value, (bar_addr + offset)); in nitrox_write_csr()
H A Dnitrox_hal.h157 int vf_get_vf_config_mode(uint8_t *bar_addr);
159 void setup_nps_pkt_input_ring(uint8_t *bar_addr, uint16_t ring, uint32_t rsize,
161 void setup_nps_pkt_solicit_output_port(uint8_t *bar_addr, uint16_t port);
162 void nps_pkt_input_ring_disable(uint8_t *bar_addr, uint16_t ring);
163 void nps_pkt_solicited_port_disable(uint8_t *bar_addr, uint16_t port);
H A Dnitrox_device.c38 ndev->bar_addr = pdev->mem_resource[0].addr; in ndev_init()
39 vf_mode = vf_get_vf_config_mode(ndev->bar_addr); in ndev_init()
H A Dnitrox_qp.h99 int nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr,
102 int nitrox_qp_release(struct nitrox_qp *qp, uint8_t *bar_addr);
H A Dnitrox_device.h16 uint8_t *bar_addr; member
H A Dnitrox_sym.c202 err = nitrox_qp_setup(qp, ndev->bar_addr, cdev->data->name, in nitrox_sym_dev_qp_setup()
218 nitrox_qp_release(qp, ndev->bar_addr); in nitrox_sym_dev_qp_setup()
251 err = nitrox_qp_release(qp, ndev->bar_addr); in nitrox_sym_dev_qp_release()
/f-stack/dpdk/drivers/bus/pci/linux/
H A Dpci_vfio.c494 void *bar_addr; in pci_vfio_mmap_bar() local
555 bar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE | in pci_vfio_mmap_bar()
557 if (bar_addr != MAP_FAILED) { in pci_vfio_mmap_bar()
561 map_addr = pci_map_resource(bar_addr, vfio_dev_fd, in pci_vfio_mmap_bar()
582 void *second_addr = RTE_PTR_ADD(bar_addr, in pci_vfio_mmap_bar()
593 munmap(bar_addr, bar->size); in pci_vfio_mmap_bar()
594 bar_addr = MAP_FAILED; in pci_vfio_mmap_bar()
606 bar->addr = bar_addr; in pci_vfio_mmap_bar()
767 void *bar_addr; in pci_vfio_map_resource_primary() local
799 bar_addr = pci_map_addr; in pci_vfio_map_resource_primary()
[all …]
/f-stack/dpdk/drivers/net/qede/base/
H A Decore_hw.c242 u32 bar_addr; in ecore_is_reg_fifo_empty() local
248 bar_addr = ecore_set_ptt(p_hwfn, p_ptt, GRC_REG_TRACE_FIFO_VALID_DATA); in ecore_is_reg_fifo_empty()
249 is_empty = REG_RD(p_hwfn, bar_addr) == 0; in ecore_is_reg_fifo_empty()
264 u32 bar_addr; in ecore_wr() local
268 bar_addr = ecore_set_ptt(p_hwfn, p_ptt, hw_addr); in ecore_wr()
269 REG_WR(p_hwfn, bar_addr, val); in ecore_wr()
272 bar_addr, hw_addr, val); in ecore_wr()
287 u32 bar_addr, val; in ecore_rd() local
291 bar_addr = ecore_set_ptt(p_hwfn, p_ptt, hw_addr); in ecore_rd()
292 val = REG_RD(p_hwfn, bar_addr); in ecore_rd()
[all …]
/f-stack/dpdk/drivers/raw/ntb/
H A Dntb.c511 void *bar_addr; in ntb_queue_init() local
523 bar_addr = (*hw->ntb_ops->get_peer_mw_addr)(dev, 0); in ntb_queue_init()
524 if (bar_addr == NULL) in ntb_queue_init()
527 ((size_t)bar_addr + hdr_offset); in ntb_queue_init()
/f-stack/freebsd/contrib/alpine-hal/
H A Dal_hal_pcie.c672 …uint32_t __iomem *bar_addr = &regs->core_space[pf_num].config_header[(AL_PCI_BASE_ADDRESS_0 >> 2) … in al_pcie_port_pf_params_config() local
743 al_reg_write32_dbi_cs2(pcie_port, bar_addr + 1, 0); in al_pcie_port_pf_params_config()
748 al_reg_write32_dbi_cs2(pcie_port, bar_addr , mask); in al_pcie_port_pf_params_config()
756 al_reg_write32(bar_addr, ctrl); in al_pcie_port_pf_params_config()
760 al_reg_write32_dbi_cs2(pcie_port, bar_addr + 1, mask); in al_pcie_port_pf_params_config()
764 al_reg_write32_dbi_cs2(pcie_port, bar_addr , mask); in al_pcie_port_pf_params_config()