Home
last modified time | relevance | path

Searched refs:bar2_cax (Results 1 – 5 of 5) sorted by relevance

/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-pcie.c734 npei_ctl_port.s.bar2_cax = 0; in __cvmx_pcie_rc_initialize_gen1()
747 npei_ctl_port.s.bar2_cax = 0; in __cvmx_pcie_rc_initialize_gen1()
1149 pemx_bar_ctl.s.bar2_cax = 0; in __cvmx_pcie_rc_initialize_gen2()
H A Dcvmx-pemx-defs.h462 uint64_t bar2_cax : 1; /**< Value will be XORed with pcie-address[40] to member
466 uint64_t bar2_cax : 1;
H A Dcvmx-pci-defs.h2504 uint32_t bar2_cax : 1; /**< Value will be XORed with pci-address[38] to member
2508 uint32_t bar2_cax : 1;
2623 uint32_t bar2_cax : 1; /**< Value will be XORed with pci-address[38] to member
2627 uint32_t bar2_cax : 1;
H A Dcvmx-npei-defs.h1825 uint64_t bar2_cax : 1; /**< Value will be XORed with pcie-address[38] to member
1836 uint64_t bar2_cax : 1;
1897 uint64_t bar2_cax : 1; /**< Value will be XORed with pcie-address[38] to member
1908 uint64_t bar2_cax : 1;
/f-stack/freebsd/mips/cavium/
H A Doctopci.c820 pci_ctl_status_2.s.bar2_cax = 1; /* Bypass cache for BAR2 */ in octopci_init_pci()