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Searched refs:banks (Results 1 – 25 of 46) sorted by relevance

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/f-stack/dpdk/drivers/net/ice/base/
H A Dice_nvm.c232 struct ice_bank_info *banks = &hw->flash.banks; in ice_read_flash_module() local
256 start = banks->nvm_ptr + (second_bank ? banks->nvm_size : 0); in ice_read_flash_module()
259 start = banks->orom_ptr + (second_bank ? banks->orom_size : 0); in ice_read_flash_module()
262 start = banks->netlist_ptr + (second_bank ? banks->netlist_size : 0); in ice_read_flash_module()
546 hw->flash.banks.orom_size); in ice_get_orom_srev()
754 struct ice_bank_info *banks = &hw->flash.banks; in ice_determine_active_flash_banks() local
771 banks->nvm_bank = ICE_1ST_FLASH_BANK; in ice_determine_active_flash_banks()
773 banks->nvm_bank = ICE_2ND_FLASH_BANK; in ice_determine_active_flash_banks()
776 banks->orom_bank = ICE_1ST_FLASH_BANK; in ice_determine_active_flash_banks()
778 banks->orom_bank = ICE_2ND_FLASH_BANK; in ice_determine_active_flash_banks()
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/gpio/
H A Dgpio-atlas7.txt7 - gpio-banks : How many gpio banks on this controller
28 gpio-banks = <2>;
H A Dbrcm,kona-gpio.txt8 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
18 number of GPIO banks on the SoC. The interrupts must be ordered by bank,
19 starting with bank 0. There is always a 1:1 mapping between banks and
H A Dmediatek,mt7621-gpio.txt3 The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
4 The registers of all the banks are interwoven inside one single IO range.
H A Dgpio-stericsson-coh901.txt7 - interrupts: the 0...n interrupts assigned to the different GPIO ports/banks.
H A Dbrcm,brcmstb-gpio.txt5 interrupt is shared for all of the banks handled by the controller.
26 correspond to number of banks suggested by the 'reg' property.
H A Dgpio-sprd.txt5 interrupt is shared for all of the banks handled by the controller.
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dimg,meta-intc.txt11 - num-banks: Specifies the number of interrupt banks (each of which can
58 // Number of interrupt banks
59 num-banks = <2>;
/f-stack/freebsd/arm/allwinner/
H A Daw_gpio.c89 const char *banks; member
106 .banks = "bcdefg",
141 .banks = "lm",
150 .banks = "bcdefgh",
160 .banks = "acdefg",
164 .banks = "l",
174 .banks = "bcdefgh"
178 .banks = "l",
192 .banks = "l",
202 .banks = "cdfgh",
[all …]
/f-stack/freebsd/contrib/device-tree/Bindings/ata/
H A Dcavium-compact-flash.txt12 - reg: The base address of the CF chip select banks. Depending on
13 the device configuration, there may be one or two banks.
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dcavium-mix.txt9 - reg: The base addresses of four separate register banks. The first
16 register banks corresponds to this MIX device.
/f-stack/freebsd/contrib/device-tree/Bindings/misc/
H A Dqcom,fastrpc.txt31 Each subnode of the Fastrpc represents compute context banks available
33 - All Compute context banks MUST contain the following properties:
/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-st.txt16 First type is via irqmux, single interrupt is used by multiple gpio banks. This
17 reduces number of overall interrupts numbers required. All these banks belong to
44 with other gpio banks via irqmux.
45 a irqline and gpio banks.
H A Dbrcm,bcm2835-gpio.txt19 individual bank followed by the "all banks" interrupt. For BCM7211, an
20 additional set of per-bank interrupt line and an "all banks" wake-up
H A Dimg,pistachio-pinctrl.txt7 configured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs
8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
/f-stack/freebsd/mips/ingenic/
H A Djz4780_nemc.c66 uint32_t banks; member
119 if (sc->banks & (1 << bank)) in jz4780_nemc_configure_bank()
188 sc->banks |= (1 << bank); in jz4780_nemc_configure_bank()
/f-stack/freebsd/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dgpio.txt17 - fsl,cpm1-gpio-irq-mask : For banks having interrupt capability (like port C
25 Example of four SOC GPIO banks defined as gpio-controller nodes:
/f-stack/freebsd/contrib/device-tree/Bindings/leds/backlight/
H A Dlm3630a-backlight.yaml52 LM3630A has two control banks (A and B) and are represented as 0 or 1
54 independently with both banks, or bank A can be configured to control
/f-stack/freebsd/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray-board-base.dtsi22 &memory { /* Default DRAM banks */
/f-stack/freebsd/contrib/device-tree/Bindings/iommu/
H A Dqcom,iommu.txt29 - ranges : Base address and size of the iommu context banks.
48 context banks)
H A Dnvidia,tegra30-smmu.txt5 - reg : Should contain 3 register banks(address and length) for each
/f-stack/freebsd/contrib/device-tree/Bindings/reset/
H A Dbrcm,brcmstb-reset.txt5 SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit
/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Dexynos-srom.yaml34 Up to four banks are supported.
93 // Example: basic definition, no banks are configured
/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml12 some control signals. It supports up to 8 banks (chip selects).
48 The address translation is arbitrary as long as the banks are assigned in
/f-stack/freebsd/contrib/device-tree/Bindings/usb/
H A Datmel-usb.txt103 - atmel,nb-banks: Number of banks.

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