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/f-stack/dpdk/drivers/common/qat/qat_adf/
H A Dadf_transport_access_macros.h92 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
93 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
95 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
96 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
98 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
99 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
102 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
109 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
120 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
127 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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/f-stack/freebsd/arm64/rockchip/
H A Drk_pinctrl.c61 uint32_t bank; member
69 uint32_t bank; member
790 if (sc->conf->pin_drive[i].bank != bank && in rk_pinctrl_parse_drive()
809 if (sc->conf->pin_fixup[i].bank == bank && in rk_pinctrl_get_fixup()
867 if (bank == sc->conf->gpio_bank[i].bank) { in rk_pinctrl_handle_io()
920 if (sc->conf->iomux_conf[i].bank == bank && in rk_pinctrl_configure_pin()
1026 if (sc->conf->iomux_conf[i].bank == bank && in rk_pinctrl_is_gpio_locked()
1087 *bank = i; in rk_pinctrl_get_bank()
1096 int bank; in rk_pinctrl_is_gpio() local
1122 int bank; in rk_pinctrl_get_flags() local
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/f-stack/freebsd/arm/mv/
H A Dmv_localbus.c92 int8_t bank; member
170 int i, rv, bank; in fdt_localbus_reg_decode() local
187 if (bank >= MV_LOCALBUS_MAX_BANKS) { in fdt_localbus_reg_decode()
189 "range\n", bank); in fdt_localbus_reg_decode()
197 if (!(sc->sc_banks[bank].mapped)) { in fdt_localbus_reg_decode()
199 "mapping\n", bank); in fdt_localbus_reg_decode()
203 di->di_bank = bank; in fdt_localbus_reg_decode()
217 "memory reserved\n", bank); in fdt_localbus_reg_decode()
389 uint32_t tuple_size, bank; in fdt_localbus_devmap() local
444 if (localbus_virtmap[k].bank == bank) { in fdt_localbus_devmap()
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/f-stack/freebsd/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-st.txt20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
49 GPIO controller/bank node.
57 - st,bank-name : Should be a name string for this bank as specified in
62 interrupt wired up for this gpio bank.
98 st,bank-name = "PIO0";
117 -bank : Should be bank phandle to which this PIO belongs.
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H A Dallwinner,sun4i-a10-pinctrl.yaml18 bank, then the pin number inside that bank, and finally the GPIO
25 of the bank, then the pin number inside that bank, and finally
64 One interrupt per external interrupt bank supported on the
65 controller, sorted by bank number ascending order.
89 bank found in the controller
101 # - Then, the bank name is optional and will be between pa and pg,
142 # FIXME: We should have the pin bank supplies here, but not a lot of
/f-stack/freebsd/arm/broadcom/bcm2835/
H A Dbcm2835_gpio.c188 bank = pin / 10; in bcm_gpio_get_function()
280 bank = pin / 10; in bcm_gpio_set_function()
292 uint32_t bank; in bcm_gpio_set_pud() local
297 bank = BCM_GPIO_BANK(pin); in bcm_gpio_set_pud()
474 uint32_t bank, reg; in bcm_gpio_pin_set() local
502 uint32_t bank, reg_data; in bcm_gpio_pin_get() local
524 uint32_t bank, data, reg; in bcm_gpio_pin_toggle() local
839 uint32_t bank; in bcm_gpio_isrc_eoi() local
857 uint32_t bank; in bcm_gpio_isrc_mask() local
885 uint32_t bank; in bcm_gpio_isrc_unmask() local
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/f-stack/freebsd/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dgpio.txt10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b",
11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d",
12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank"
29 compatible = "fsl,cpm1-pario-bank-a";
36 compatible = "fsl,cpm1-pario-bank-b";
43 compatible = "fsl,cpm1-pario-bank-c";
53 compatible = "fsl,cpm1-pario-bank-e";
/f-stack/freebsd/contrib/device-tree/src/powerpc/
H A Dmedia5200.dts113 bank-width = <4>; // Width in bytes of the flash bank
114 device-width = <2>; // Two devices on each bank
120 bank-width = <4>; // Width in bytes of the flash bank
121 device-width = <2>; // Two devices on each bank
127 #interrupt-cells = <2>; // 0:bank 1:id; no type field
131 interrupts = <0 0 3 // IRQ bank 0
132 1 1 3>; // IRQ bank 1
/f-stack/freebsd/arm/allwinner/
H A Daw_gpio.c262 uint32_t bank; member
340 uint32_t bank, func, offset; in aw_gpio_get_function() local
383 uint32_t bank, offset, val; in aw_gpio_get_pud() local
400 uint32_t bank, offset, val; in aw_gpio_set_pud() local
421 uint32_t bank, offset, val; in aw_gpio_get_drv() local
438 uint32_t bank, offset, val; in aw_gpio_set_drv() local
619 uint32_t bank, data; in aw_gpio_pin_set_locked() local
658 uint32_t bank, reg_data; in aw_gpio_pin_get_locked() local
762 uint32_t bank, data; in aw_gpio_pin_toggle() local
788 uint32_t bank, data, pin; in aw_gpio_pin_access_32() local
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/f-stack/freebsd/x86/x86/
H A Dmca.c136 mca_ia32_ctl_reg(int bank) in mca_ia32_ctl_reg() argument
138 return (MSR_MC_CTL(bank)); in mca_ia32_ctl_reg()
142 mca_ia32_status_reg(int bank) in mca_ia32_status_reg() argument
148 mca_ia32_addr_reg(int bank) in mca_ia32_addr_reg() argument
150 return (MSR_MC_ADDR(bank)); in mca_ia32_addr_reg()
154 mca_ia32_misc_reg(int bank) in mca_ia32_misc_reg() argument
156 return (MSR_MC_MISC(bank)); in mca_ia32_misc_reg()
160 mca_smca_ctl_reg(int bank) in mca_smca_ctl_reg() argument
172 mca_smca_addr_reg(int bank) in mca_smca_addr_reg() argument
178 mca_smca_misc_reg(int bank) in mca_smca_misc_reg() argument
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/f-stack/freebsd/contrib/device-tree/Bindings/soc/fsl/cpm_qe/qe/
H A Dpar_io.txt26 the new device trees. Instead, each Par I/O bank should be represented
31 - compatible : should be "fsl,<chip>-qe-pario-bank",
32 "fsl,mpc8323-qe-pario-bank".
39 compatible = "fsl,mpc8360-qe-pario-bank",
40 "fsl,mpc8323-qe-pario-bank";
47 compatible = "fsl,mpc8360-qe-pario-bank",
48 "fsl,mpc8323-qe-pario-bank";
/f-stack/freebsd/mips/ingenic/
H A Djz4780_nemc.c59 uint32_t bank; member
112 device_t dev, u_int bank) in jz4780_nemc_configure_bank() argument
119 if (sc->banks & (1 << bank)) in jz4780_nemc_configure_bank()
122 smcr = CSR_READ_4(sc, JZ_NEMC_SMCR(bank)); in jz4780_nemc_configure_bank()
187 CSR_WRITE_4(sc, JZ_NEMC_SMCR(bank), smcr); in jz4780_nemc_configure_bank()
188 sc->banks |= (1 << bank); in jz4780_nemc_configure_bank()
312 u_int *bank) in jz4780_nemc_decode_bank() argument
324 *bank = (sc->ranges[i].bus >> 32); in jz4780_nemc_decode_bank()
336 u_int bank; in jz4780_nemc_activate_resource() local
343 err = jz4780_nemc_decode_bank(&sc->simplebus_sc, r, &bank); in jz4780_nemc_activate_resource()
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/f-stack/freebsd/contrib/device-tree/Bindings/memory-controllers/
H A Dexynos-srom.yaml32 Reflects the memory layout with four integer values per bank. Format:
33 <bank-number> 0 <parent address of bank> <size>
43 of the relevant SROM bank.
48 Bank number, base address (relative to start of the bank) and size
50 typically 0 as this is the start of the bank.
70 Array of 6 integers, specifying bank timings in the following order:
100 // Example: SROMc with SMSC911x ethernet chip on bank 3
/f-stack/freebsd/contrib/device-tree/Bindings/bus/
H A Dsocionext,uniphier-system-bus.yaml16 within each bank to the CPU-viewed address. The needed setup includes the
17 base address, the size of each bank. Optionally, some timing parameters can
32 The first cell is the bank number (chip select).
33 The second cell is the address offset within the bank.
53 bank 0 to 0x42000000-0x43ffffff, bank 5 to 0x46000000-0x46ffffff
55 bank 0 to 0x48000000-0x49ffffff, bank 5 to 0x44000000-0x44ffffff
/f-stack/freebsd/contrib/device-tree/src/arm/
H A Dstm32f7-pinctrl.dtsi27 st,bank-name = "GPIOA";
37 st,bank-name = "GPIOB";
47 st,bank-name = "GPIOC";
57 st,bank-name = "GPIOD";
67 st,bank-name = "GPIOE";
77 st,bank-name = "GPIOF";
87 st,bank-name = "GPIOG";
97 st,bank-name = "GPIOH";
107 st,bank-name = "GPIOI";
117 st,bank-name = "GPIOJ";
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H A Dstm32h743-pinctrl.dtsi61 st,bank-name = "GPIOA";
71 st,bank-name = "GPIOB";
81 st,bank-name = "GPIOC";
91 st,bank-name = "GPIOD";
101 st,bank-name = "GPIOE";
111 st,bank-name = "GPIOF";
121 st,bank-name = "GPIOG";
131 st,bank-name = "GPIOH";
141 st,bank-name = "GPIOI";
151 st,bank-name = "GPIOJ";
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/f-stack/freebsd/contrib/device-tree/src/mips/pic32/
H A Dpic32mzda.dtsi96 microchip,gpio-bank = <0>;
110 microchip,gpio-bank = <1>;
124 microchip,gpio-bank = <2>;
138 microchip,gpio-bank = <3>;
152 microchip,gpio-bank = <4>;
166 microchip,gpio-bank = <5>;
180 microchip,gpio-bank = <6>;
194 microchip,gpio-bank = <7>;
210 microchip,gpio-bank = <8>;
224 microchip,gpio-bank = <9>;
/f-stack/freebsd/contrib/device-tree/Bindings/net/
H A Dcavium-mix.txt10 bank contains the MIX registers. The second bank the corresponding
11 AGL registers. The third bank are the AGL registers shared by all
12 MIX devices present. The fourth bank is the AGL_PRT_CTL shared by
/f-stack/freebsd/contrib/device-tree/Bindings/leds/
H A Dleds-lm3697.txt21 - reg : 0 - LED is Controlled by bank A
22 1 - LED is Controlled by bank B
24 control bank. This is a zero based property so
39 HVLED string 1 and 3 are controlled by control bank A and HVLED 2 string is
40 controlled by control bank B.
/f-stack/freebsd/contrib/device-tree/Bindings/iommu/
H A Dqcom,iommu.txt27 - #iommu-cells : Must be 1. Index identifies the context-bank #.
33 - List of sub-nodes, one per translation context bank. Each sub-node
37 - "qcom,msm-iommu-v1-ns" : non-secure context bank
38 - "qcom,msm-iommu-v1-sec" : secure context bank
39 - reg : Base address and size of context bank within the iommu
46 for routing of context bank irq's to secure vs non-
/f-stack/freebsd/contrib/device-tree/Bindings/mtd/
H A Dibm,ndfc.txt9 - bank-settings : NDFC bank configuration register value (default 0).
20 bank-settings = <0x80002222>;
H A Dmtd-physmap.txt12 - bank-width : Width (in bytes) of the bank. Equal to the
15 omitted, assumed to be equal to 'bank-width'.
61 bank-width = <4>;
84 bank-width = <2>;
96 bank-width = <2>;
108 bank-width = <2>;
H A Dfsmc-nand.txt10 - bank-width : Width (in bytes) of the device. If not present, the width
32 - bank: default NAND bank to use (0-3 are valid, 0 is the default).
52 bank-width = <1>;
55 bank = <1>;
/f-stack/freebsd/contrib/device-tree/Bindings/mips/cavium/
H A Dciu.txt10 - reg: The base address of the CIU's register bank.
12 - #interrupt-cells: Must be <2>. The first cell is the bank within
14 within the bank and may have a value between 0 and 63.
H A Dciu2.txt10 - reg: The base address of the CIU's register bank.
12 - #interrupt-cells: Must be <2>. The first cell is the bank within
14 the bit within the bank and may also have a value between 0 and 63.

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