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Searched refs:aintc_write_4 (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/arm/allwinner/a10/
H A Da10_intc.c112 #define aintc_write_4(sc, reg, val) \ macro
122 aintc_write_4(sc, SW_INT_IRQ_PENDING_REG(0), in a10_intr_eoi()
138 aintc_write_4(sc, SW_INT_ENABLE_REG(block), value); in a10_intr_unmask()
142 aintc_write_4(sc, SW_INT_MASK_REG(block), value); in a10_intr_unmask()
157 aintc_write_4(sc, SW_INT_ENABLE_REG(block), value); in a10_intr_mask()
161 aintc_write_4(sc, SW_INT_MASK_REG(block), value); in a10_intr_mask()
345 aintc_write_4(sc, SW_INT_ENABLE_REG(i), 0); in a10_aintc_attach()
346 aintc_write_4(sc, SW_INT_MASK_REG(i), 0xffffffff); in a10_aintc_attach()
349 aintc_write_4(sc, SW_INT_PROTECTION_REG, 0x01); in a10_aintc_attach()
352 aintc_write_4(sc, SW_INT_NMI_CTRL_REG, 0x00); in a10_aintc_attach()
/f-stack/freebsd/arm/ti/
H A Daintc.c90 #define aintc_write_4(_sc, reg, val) \ macro
104 aintc_write_4(sc, INTC_CONTROL, 1); in ti_aintc_irq_eoi()
111 aintc_write_4(sc, INTC_MIR_SET(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_mask()
118 aintc_write_4(sc, INTC_MIR_CLEAR(irq >> 5), (1UL << (irq & 0x1F))); in ti_aintc_irq_unmask()
271 aintc_write_4(sc, INTC_SYSCONFIG, 2); in ti_aintc_attach()
277 aintc_write_4(sc, INTC_THRESHOLD, 0xFF); in ti_aintc_attach()