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Searched refs:_ah (Results 1 – 9 of 9) sorted by relevance

/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300reg.h727 #define AR_HOSTIF_REG(_ah, _reg) (AH9300(_ah)->ah_hostifregs._reg) argument
3013 #define AR_SREV_OSPREY(_ah) \ argument
3028 #define AR_SREV_AR9580(_ah) \ argument
3038 (AR_SREV_AR9580(_ah) || AR_SREV_SCORPION(_ah) || AR_SREV_HONEYBEE(_ah))
3040 #define AR_SREV_JUPITER(_ah) \ argument
3083 #define AR_SREV_HORNET(_ah) \ argument
3084 ( AR_SREV_HORNET_10(_ah) || AR_SREV_HORNET_11(_ah) || AR_SREV_HORNET_12(_ah) )
3093 #define AR_SREV_WASP(_ah) \ argument
3114 #define AR_SREV_WASP_10(_ah) \ argument
3118 #define AR_SREV_WASP_11(_ah) \ argument
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H A Dar9300_spectral.c304 #define ar9300_noise_floor_get(_ah,_f,_ich) ar9300_noise_floor_cal_or_power_get((_ah), (_f… argument
305 #define ar9300_noise_floor_power_get(_ah,_f,_ich) ar9300_noise_floor_cal_or_power_get((_ah), (_f… argument
H A Dar9300phy.h805 #define AR_PHY_TX_IQCAL_CONTROL_0(_ah) \ argument
806 (AR_SREV_POSEIDON(_ah) ? \
810 #define AR_PHY_TX_IQCAL_CONTROL_1(_ah) \ argument
811 (AR_SREV_POSEIDON(_ah) ? \
815 #define AR_PHY_TX_IQCAL_START(_ah) \ argument
816 (AR_SREV_POSEIDON(_ah) ? \
820 #define AR_PHY_TX_IQCAL_STATUS_B0(_ah) \ argument
821 (AR_SREV_POSEIDON(_ah) ? \
H A Dar9300desc.h472 #define IS_3CHAIN_TX(_ah) (AH9300(_ah)->ah_tx_chainmask == 7) argument
H A Dar9300.h893 #define AH9300(_ah) ((struct ath_hal_9300 *)(_ah)) argument
898 #define ar9300_eep_data_in_flash(_ah) \ argument
899 (!(AH_PRIVATE(_ah)->ah_flags & AH_USE_EEPROM))
904 ((ar9300_eeprom_get(AH9300(_ah), EEP_MINOR_REV) <= AR9300_EEP_MINOR_VER_16) || \
905 (ar9300_eeprom_get(AH9300(_ah), EEP_FSTCLK_5G))))
H A Dar9300_power.c305 #define WOW_WRITE_NS_IPV6_ADDRESS(_ah, _buf_addr, _p_ipv6_addr) \ argument
311 OS_REG_WRITE((_ah), offset, *p_ipv6_addr); \
H A Dar9300_attach.c3327 #define AR9300_IS_CHAIN_RX_IQCAL_INVALID(_ah, _reg) \
3328 ((OS_REG_READ((_ah), _reg) & 0x3fff) == 0)
3329 #define AR9300_IS_RX_IQCAL_DISABLED(_ah) \
3330 (!(OS_REG_READ((_ah), AR_PHY_RX_IQCAL_CORR_B0) & \
H A Dar9300_ani.c1095 #define CLOCK_RATE(_ah) (ath_hal_mac_clks(ah, 1000)) argument
H A Dar9300_reset.c1797 #define DDR_REG_READ(_ah, _reg) \ in ar9300_set_reset() argument
1799 #define DDR_REG_WRITE(_ah, _reg, _val) \ in ar9300_set_reset() argument