Searched refs:ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK (Results 1 – 2 of 2) sorted by relevance
277 reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK); in zy7_pl_fclk_set_source()303 source = (reg & ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK) >> in zy7_pl_fclk_get_source()
159 #define ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK (3 << 4) macro