Searched refs:XUSB_PADCTL_UPHY_PLL_S0_CTL2 (Results 1 – 1 of 1) sorted by relevance
| /f-stack/freebsd/arm64/nvidia/tegra210/ |
| H A D | tegra210_xusbpadctl.c | 276 #define XUSB_PADCTL_UPHY_PLL_S0_CTL2 0x864 macro
810 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
812 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg); in uphy_sata_enable()
864 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
866 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg); in uphy_sata_enable()
868 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
880 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
882 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg); in uphy_sata_enable()
884 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
958 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2); in uphy_sata_enable()
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