Searched refs:XUSB_PADCTL_UPHY_PLL_S0_CTL1 (Results 1 – 1 of 1) sorted by relevance
| /f-stack/freebsd/arm64/nvidia/tegra210/ |
| H A D | tegra210_xusbpadctl.c | 263 #define XUSB_PADCTL_UPHY_PLL_S0_CTL1 0x860 macro
806 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1); in uphy_sata_enable()
808 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1, reg); in uphy_sata_enable()
838 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1); in uphy_sata_enable()
845 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1, reg); in uphy_sata_enable()
847 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1); in uphy_sata_enable()
849 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1, reg); in uphy_sata_enable()
851 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1); in uphy_sata_enable()
853 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1, reg); in uphy_sata_enable()
899 WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL1, reg); in uphy_sata_enable()
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