Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL8 (Results 1 – 1 of 1) sorted by relevance
| /f-stack/freebsd/arm64/nvidia/tegra210/ |
| H A D | tegra210_xusbpadctl.c | 252 #define XUSB_PADCTL_UPHY_PLL_P0_CTL8 0x37c macro
591 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in uphy_pex_enable()
593 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8, reg); in uphy_pex_enable()
679 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in uphy_pex_enable()
682 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8, reg); in uphy_pex_enable()
697 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in uphy_pex_enable()
699 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8, reg); in uphy_pex_enable()
715 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in uphy_pex_enable()
717 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8, reg); in uphy_pex_enable()
730 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in uphy_pex_enable()
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