Home
last modified time | relevance | path

Searched refs:XUSB_PADCTL_UPHY_PLL_P0_CTL5 (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c246 #define XUSB_PADCTL_UPHY_PLL_P0_CTL5 0x370 macro
578 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in uphy_pex_enable()
581 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL5, reg); in uphy_pex_enable()
801 reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in uphy_sata_enable()
804 WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL5, reg); in uphy_sata_enable()