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Searched refs:XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_car.h266 #define XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL (1 << 0) macro
H A Dtegra124_clk_pll.c641 reg &= ~XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; in plle_enable()
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_car.h370 #define XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL (1 << 0) macro
H A Dtegra210_clk_pll.c835 reg &= ~XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; in plle_enable()