Searched refs:WP (Results 1 – 25 of 38) sorted by relevance
12
21 /* No CD or WP GPIOs */
39 MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
49 /* No WP GPIO */
299 /* WP */314 /* WP */
77 /* No CD or WP GPIOs */
94 AT91_PIOC 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* WP pin */
89 /* No CD or WP GPIOs */
87 * No CD or WP GPIOs: SDIO interface used for
104 /* No WP GPIO */
106 /* No CD or WP GPIOs */
327 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */370 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
565 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* SD2 WP */578 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* SD3 WP */
89 AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
73 /* No CD or WP GPIOs */
131 /* No CD or WP GPIOs */
654 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */697 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
97 /* No CD or WP GPIOs */
165 MX27_PAD_SSI3_FS__GPIO3_28 0x0 /* WP */
223 MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */
152 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
57 * 1.0 MMC WP
23 * acpi=no is required due to WP platforms having ACPI support, but
47 # *NOTE* on CD and WP polarity. To use common for all SD/MMC host55 # CD and WP lines can be implemented on the hardware in one of two60 # latter case. We choose to use the XOR logic for GPIO CD and WP
55 (WP) control bit. It is always available on >=57 earlier versions of this core that include WP
167 wp-inverted; /* WP active high */