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Searched refs:WDT (Results 1 – 25 of 25) sorted by relevance

/f-stack/freebsd/contrib/device-tree/Bindings/watchdog/
H A Dgpio-wdt.txt5 - gpios: From common gpio binding; gpio connection to WDT reset pin.
9 the WDT counter. The watchdog timer is disabled when GPIO is
11 - level: Low or high level starts counting WDT timeout,
12 the opposite level disables the WDT. Active level is determined
H A Dimgpdc-wdt.txt1 *ImgTec PowerDown Controller (PDC) Watchdog Timer (WDT)
5 - reg : Should contain WDT registers location and length
9 - interrupts : Should contain WDT interrupt
H A Dlpc18xx-wdt.txt1 * NXP LPC18xx Watchdog Timer (WDT)
5 - reg: Should contain WDT registers location and length
9 - interrupts: Should contain WDT interrupt
H A Darm,sp805.txt3 SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that
7 As SP805 WDT is a primecell IP, it follows the base bindings specified in
21 - interrupts: Should specify WDT interrupt number
22 - timeout-sec: Should specify default WDT timeout in seconds. If unset, the
H A Dsirfsoc_wdt.txt1 SiRFSoC Timer and Watchdog Timer(WDT) Controller
5 - reg: Address range of tick timer/WDT register set
H A Domap-wdt.txt1 TI Watchdog Timer (WDT) Controller for OMAP
5 - ti,hwmods : Name of the hwmod associated to the WDT
H A Ddavinci-wdt.txt1 Texas Instruments DaVinci/Keystone Watchdog Timer (WDT) Controller
5 - reg : Should contain WDT registers location and length
H A Dqca-ar7130-wdt.txt1 * Qualcomm Atheros AR7130 Watchdog Timer (WDT) Controller
H A Dmicrochip,pic32-wdt.txt4 WDT is not cleared periodically in software.
H A Dfsl-imx7ulp-wdt.yaml7 title: Freescale i.MX7ULP Watchdog Timer (WDT) Controller
H A Dfsl-imx-wdt.yaml7 title: Freescale i.MX Watchdog Timer (WDT) Controller
H A Dmpc8xxx-wdt.txt22 WDT: watchdog@0 {
H A Dsamsung-wdt.yaml14 after a preset amount of time during which the WDT reset event has not
H A Datmel-sama5d4-wdt.txt1 * Atmel SAMA5D4 Watchdog Timer (WDT) Controller
H A Dti,rti-wdt.yaml52 * RTI WDT in main domain on J721e SoC. Assigned clocks are used to
H A Datmel-wdt.txt13 - interrupts : Should contain WDT interrupt.
H A Drenesas,wdt.yaml7 title: Renesas Watchdog Timer (WDT) Controller
/f-stack/freebsd/contrib/device-tree/Bindings/power/reset/
H A Dkeystone-reset.txt29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
30 to WDT driver, it's just needed to enable a SoC related
/f-stack/freebsd/contrib/device-tree/include/dt-bindings/clock/
H A Dxlnx-zynqmp-clk.h87 #define WDT 75 macro
H A Dxlnx-versal-clk.h47 #define WDT 38 macro
/f-stack/freebsd/contrib/device-tree/Bindings/mfd/
H A Dsamsung,exynos5433-lpass.txt18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
/f-stack/freebsd/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-clk-ccf.dtsi221 clocks = <&zynqmp_clk WDT>;
/f-stack/freebsd/contrib/device-tree/Bindings/interrupt-controller/
H A Dimg,pdc-intc.txt76 <31 4 /* level */>; /* Peripheral 2 (WDT) */
/f-stack/freebsd/contrib/device-tree/Bindings/clock/
H A Dexynos5433-clock.txt19 which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs.
/f-stack/freebsd/contrib/dev/ath/ath_hal/ar9300/
H A Dosprey_reg_map.h2460 volatile u_int32_t WDT; /* 0x34 - 0x38 */ member