| /f-stack/freebsd/contrib/openzfs/module/zfs/ |
| H A D | vdev_raidz_math_powerpc_altivec_common.h | 57 #define VR3(r...) VR3_(r, 36, 35) macro
153 "vxor " VR3(r) "," VR3(r) ",18\n" \
183 "vxor " VR3(r) "," VR3(r) ",18\n" \
222 "vxor " VR3(r) "," VR3(r) "," VR1(r) "\n" \
239 "vxor " VR3(r) "," VR3(r) "," VR3(r) "\n" \
252 "vxor " VR3(r) "," VR3(r) "," VR3(r) "\n" \
274 "vor " VR7(r) "," VR3(r) "," VR3(r) "\n" \
298 "lvx " VR3(r) " ,0,%[SRC3]\n" \
319 "lvx " VR3(r) " ,0,%[SRC3]\n" \
427 "vaddubm " VR3(r) "," VR3(r) "," VR3(r) "\n" \
[all …]
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| H A D | vdev_raidz_math_aarch64_neon_common.h | 56 #define VR3(r...) VR3_(r, 36, 35) macro
152 "eor " VR3(r) ".16b," VR3(r) ".16b,v18.16b\n" \
182 "eor " VR3(r) ".16b," VR3(r) ".16b,v18.16b\n" \
221 "eor " VR3(r) ".16b," VR3(r) ".16b," VR1(r) ".16b\n" \
238 "eor " VR3(r) ".16b," VR3(r) ".16b," VR3(r) ".16b\n" \
251 "eor " VR3(r) ".16b," VR3(r) ".16b," VR3(r) ".16b\n" \
297 "ld1 { " VR3(r) ".4s },%[SRC3]\n" \
318 "ld1 { " VR3(r) ".4s },%[SRC3]\n" \
346 "st1 { " VR3(r) ".4s },%[DST3]\n" \
422 "shl " VR3(r) ".16b," VR3(r) ".16b,#1\n" \
[all …]
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| H A D | vdev_raidz_math_avx512bw.c | 54 #define VR3(r...) VR3_(r, 1, 2) macro
82 "vpxorq 0xc0(%[SRC]), %%" VR3(r)", %%" VR3(r) "\n" \
104 "vpxorq %" VR3(r) ", %" VR7(r)", %" VR7(r)); \
109 "vpxorq %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
126 "vmovdqa64 %" VR3(r) ", %" VR7(r)); \
131 "vmovdqa64 %" VR1(r) ", %" VR3(r)); \
146 "vmovdqa64 0xc0(%[SRC]), %%" VR3(r) "\n" \
168 "vmovdqa64 %%" VR3(r) ", 0xc0(%[DST])\n" \
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| H A D | vdev_raidz_math_avx2.c | 50 #define VR3(r...) VR3_(r, 1, 2) macro
79 "vpxor 0x60(%[SRC]), %%" VR3(r)", %%" VR3(r) "\n" \
101 "vpxor %" VR3(r) ", %" VR7(r)", %" VR7(r)); \
106 "vpxor %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
123 "vmovdqa %" VR3(r) ", %" VR7(r)); \
128 "vmovdqa %" VR1(r) ", %" VR3(r)); \
143 "vmovdqa 0x60(%[SRC]), %%" VR3(r) "\n" \
165 "vmovdqa %%" VR3(r) ", 0x60(%[DST])\n" \
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| H A D | vdev_raidz_math_ssse3.c | 51 #define VR3(r...) VR3_(r, 1, 2) macro
80 "pxor 0x30(%[SRC]), %%" VR3(r) "\n" \
102 "pxor %" VR3(r) ", %" VR7(r)); \
107 "pxor %" VR1(r) ", %" VR3(r)); \
124 "movdqa %" VR3(r) ", %" VR7(r)); \
129 "movdqa %" VR1(r) ", %" VR3(r)); \
144 "movdqa 0x30(%[SRC]), %%" VR3(r) "\n" \
166 "movdqa %%" VR3(r)", 0x30(%[DST])\n" \
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| H A D | vdev_raidz_math_avx512f.c | 53 #define VR3(r...) VR3_(r, 1, 2) macro
96 "vpxorq 0xc0(%[SRC]), %%" VR3(r)", %%" VR3(r) "\n" \
110 "vpxorq %" VR3(r) ", %" VR7(r)", %" VR7(r)); \
115 "vpxorq %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
132 "vmovdqa64 %" VR3(r) ", %" VR7(r)); \
137 "vmovdqa64 %" VR1(r) ", %" VR3(r)); \
150 "vmovdqa64 0xc0(%[SRC]), %%" VR3(r) "\n" \
164 "vmovdqa64 %%" VR3(r) ", 0xc0(%[DST])\n" \
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| H A D | vdev_raidz_math_sse2.c | 52 #define VR3(r...) VR3_(r, 1, 2, 3, 4, 5, 6) macro
72 "pxor 0x30(%[SRC]), %%" VR3(r) "\n" \
96 "pxor %" VR3(r) ", %" VR7(r)); \
101 "pxor %" VR1(r) ", %" VR3(r)); \
120 "movdqa %" VR3(r) ", %" VR7(r)); \
125 "movdqa %" VR1(r) ", %" VR3(r)); \
144 "movdqa 0x30(%[SRC]), %%" VR3(r) "\n" \
169 "movdqa %%" VR3(r)", 0x30(%[DST])\n" \
226 _MUL2_x2(VR2(r), VR3(r)); \
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