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Searched refs:VR1 (Results 1 – 7 of 7) sorted by relevance

/f-stack/freebsd/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_avx512bw.c52 #define VR1(r...) VR1_(r) macro
80 "vpxorq 0x40(%[SRC]), %%" VR1(r)", %%" VR1(r) "\n" \
88 "vpxorq 0x40(%[SRC]), %%" VR1(r)", %%" VR1(r) "\n" \
124 "vmovdqa64 %" VR1(r) ", %" VR5(r) "\n" \
131 "vmovdqa64 %" VR1(r) ", %" VR3(r)); \
144 "vmovdqa64 0x40(%[SRC]), %%" VR1(r) "\n" \
197 "vpaddb %" VR1(r)", %" VR1(r)", %" VR1(r) "\n" \
252 "vpandq %%" _0f ", %%" VR1(r) ", %%" VR1(r) "\n" \
270 "vpshufb %%" VR1(r) ", %%" _ltmul ", %%" VR1(r) "\n"\
274 "vpxorq %%" _tb ", %%" VR1(r) ", %%" VR1(r) "\n" \
[all …]
H A Dvdev_raidz_math_avx2.c48 #define VR1(r...) VR1_(r) macro
77 "vpxor 0x20(%[SRC]), %%" VR1(r)", %%" VR1(r) "\n" \
85 "vpxor 0x20(%[SRC]), %%" VR1(r)", %%" VR1(r) "\n" \
121 "vmovdqa %" VR1(r) ", %" VR5(r) "\n" \
128 "vmovdqa %" VR1(r) ", %" VR3(r)); \
199 "vpaddb %" VR1(r)", %" VR1(r)", %" VR1(r) "\n" \
203 "vpxor %ymm13, %" VR1(r)", %" VR1(r)); \
254 "vpand %%" _0f ", %%" VR1(r) ", %%" VR1(r) "\n" \
272 "vpshufb %%" VR1(r) ", %%" _ltmul ", %%" VR1(r) "\n"\
276 "vpxor %%" _tb ", %%" VR1(r) ", %%" VR1(r) "\n" \
[all …]
H A Dvdev_raidz_math_ssse3.c49 #define VR1(r...) VR1_(r) macro
78 "pxor 0x10(%[SRC]), %%" VR1(r) "\n" \
86 "pxor 0x10(%[SRC]), %%" VR1(r) "\n" \
100 "pxor %" VR1(r) ", %" VR5(r) "\n" \
107 "pxor %" VR1(r) ", %" VR3(r)); \
129 "movdqa %" VR1(r) ", %" VR3(r)); \
196 "pcmpgtb %" VR1(r)", %xmm13\n" \
200 "paddb %" VR1(r)", %" VR1(r) "\n" \
202 "pxor %xmm13, %" VR1(r)); \
252 "psraw $0x4, %%" VR1(r) "\n" \
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H A Dvdev_raidz_math_powerpc_altivec_common.h151 "vxor " VR1(r) "," VR1(r) ",20\n" \
181 "vxor " VR1(r) "," VR1(r) ",20\n" \
196 "vxor " VR1(r) "," VR1(r) ",20\n" \
237 "vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
250 "vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
258 "vxor " VR1(r) "," VR1(r) "," VR1(r) "\n" \
425 "vaddubm " VR1(r) "," VR1(r) "," VR1(r) "\n" \
429 "vxor " VR1(r) ",18," VR1(r) "\n" \
443 "vaddubm " VR1(r) "," VR1(r) "," VR1(r) "\n" \
445 "vxor " VR1(r) ",18," VR1(r) "\n" \
[all …]
H A Dvdev_raidz_math_aarch64_neon_common.h150 "eor " VR1(r) ".16b," VR1(r) ".16b,v20.16b\n" \
180 "eor " VR1(r) ".16b," VR1(r) ".16b,v20.16b\n" \
195 "eor " VR1(r) ".16b," VR1(r) ".16b,v20.16b\n" \
236 "eor " VR1(r) ".16b," VR1(r) ".16b," VR1(r) ".16b\n" \
249 "eor " VR1(r) ".16b," VR1(r) ".16b," VR1(r) ".16b\n" \
257 "eor " VR1(r) ".16b," VR1(r) ".16b," VR1(r) ".16b\n" \
420 "shl " VR1(r) ".16b," VR1(r) ".16b,#1\n" \
424 "eor " VR1(r) ".16b,v18.16b," VR1(r) ".16b\n" \
438 "shl " VR1(r) ".16b," VR1(r) ".16b,#1\n" \
440 "eor " VR1(r) ".16b,v18.16b," VR1(r) ".16b\n" \
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H A Dvdev_raidz_math_avx512f.c51 #define VR1(r...) VR1_(r) macro
94 "vpxorq 0x40(%[SRC]), %%" VR1(r)", %%" VR1(r) "\n" \
108 "vpxorq %" VR1(r) ", %" VR5(r)", %" VR5(r) "\n" \
115 "vpxorq %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
130 "vmovdqa64 %" VR1(r) ", %" VR5(r) "\n" \
137 "vmovdqa64 %" VR1(r) ", %" VR3(r)); \
148 "vmovdqa64 0x40(%[SRC]), %%" VR1(r) "\n" \
162 "vmovdqa64 %%" VR1(r) ", 0x40(%[DST])\n" \
186 "vpandq %" VR1(r)", %zmm30, %zmm25\n" \
194 "vpsllq $1, %" VR1(r)", %" VR1(r) "\n" \
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H A Dvdev_raidz_math_sse2.c50 #define VR1(r...) VR1_(r, 1, 2, 3, 4, 5, 6) macro
70 "pxor 0x10(%[SRC]), %%" VR1(r) "\n" \
78 "pxor 0x10(%[SRC]), %%" VR1(r) "\n" \
94 "pxor %" VR1(r) ", %" VR5(r) "\n" \
101 "pxor %" VR1(r) ", %" VR3(r)); \
105 "pxor %" VR0(r) ", %" VR1(r)); \
118 "movdqa %" VR1(r) ", %" VR5(r) "\n" \
125 "movdqa %" VR1(r) ", %" VR3(r)); \
129 "movdqa %" VR0(r) ", %" VR1(r)); \
225 _MUL2_x2(VR0(r), VR1(r)); \
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