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Searched refs:UTMIPLL_HW_PWRDN_CFG0 (Results 1 – 4 of 4) sorted by relevance

/f-stack/freebsd/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c1105 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1109 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
1119 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1122 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
1126 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1128 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
H A Dtegra124_car.h269 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro
/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_clk_pll.c1399 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1401 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
1441 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1444 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
1453 CLKDEV_READ_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, &reg); in config_utmi_pll()
1455 CLKDEV_WRITE_4(sc->dev, UTMIPLL_HW_PWRDN_CFG0, reg); in config_utmi_pll()
H A Dtegra210_car.h375 #define UTMIPLL_HW_PWRDN_CFG0 0x52c macro