1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights 5 * reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * NETLOGIC_BSD 31 * $FreeBSD$ 32 */ 33 34 #ifndef __NLM_USB_H__ 35 #define __NLM_USB_H__ 36 37 #define USB_CTL_0 0x01 38 #define USB_PHY_0 0x0A 39 #define USB_PHY_RESET 0x01 40 #define USB_PHY_PORT_RESET_0 0x10 41 #define USB_PHY_PORT_RESET_1 0x20 42 #define USB_CONTROLLER_RESET 0x01 43 #define USB_INT_STATUS 0x0E 44 #define USB_INT_EN 0x0F 45 #define USB_PHY_INTERRUPT_EN 0x01 46 #define USB_OHCI_INTERRUPT_EN 0x02 47 #define USB_OHCI_INTERRUPT1_EN 0x04 48 #define USB_OHCI_INTERRUPT2_EN 0x08 49 #define USB_CTRL_INTERRUPT_EN 0x10 50 51 #if !defined(LOCORE) && !defined(__ASSEMBLY__) 52 53 #define nlm_read_usb_reg(b, r) nlm_read_reg(b,r) 54 #define nlm_write_usb_reg(b, r, v) nlm_write_reg(b,r,v) 55 #define nlm_get_usb_pcibase(node, inst) nlm_pcicfg_base(XLP_IO_USB_OFFSET(node, inst)) 56 #define nlm_get_usb_hcd_base(node, inst) nlm_xkphys_map_pcibar0(nlm_get_usb_pcibase(node, inst)) 57 #define nlm_get_usb_regbase(node, inst) (nlm_get_usb_pcibase(node, inst) + XLP_IO_PCI_HDRSZ) 58 59 #endif 60 #endif 61