UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL (reference) in projects: f-stack

Searched refs:UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A D	tegra210_xusbpadctl.c	`289 #define UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL(x) (((x) & 0x3) << 12) macro 823 reg &= ~UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL(~0); in uphy_sata_enable() 828 reg \|= UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL(0x2); in uphy_sata_enable() 830 reg \|= UPHY_PLL_S0_CTL4_PLL0_TXCLKREF_SEL(0x0); in uphy_sata_enable()`