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Searched refs:UPHY_PLL_S0_CTL1_PLL0_PWR_OVRD (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c271 #define UPHY_PLL_S0_CTL1_PLL0_PWR_OVRD (1 << 4) macro
807 reg |= UPHY_PLL_S0_CTL1_PLL0_PWR_OVRD; in uphy_sata_enable()
955 reg &= ~UPHY_PLL_S0_CTL1_PLL0_PWR_OVRD; in uphy_sata_enable()