UPHY_PLL_S0_CTL1_PLL0_ENABLE (reference) in projects: f-stack

Searched refs:UPHY_PLL_S0_CTL1_PLL0_ENABLE (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A D	tegra210_xusbpadctl.c	`272 #define UPHY_PLL_S0_CTL1_PLL0_ENABLE (1 << 3) macro 898 reg \|= UPHY_PLL_S0_CTL1_PLL0_ENABLE; in uphy_sata_enable()`