Searched refs:UPHY_PLL_P0_CTL8_PLL0_RCAL_CLK_EN (Results 1 – 1 of 1) sorted by relevance
258 #define UPHY_PLL_P0_CTL8_PLL0_RCAL_CLK_EN (1 << 13) macro681 reg |= UPHY_PLL_P0_CTL8_PLL0_RCAL_CLK_EN; in uphy_pex_enable()716 reg &= ~UPHY_PLL_P0_CTL8_PLL0_RCAL_CLK_EN; in uphy_pex_enable()