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Searched refs:UPHY_PLL_P0_CTL2_PLL0_CAL_EN (Results 1 – 1 of 1) sorted by relevance

/f-stack/freebsd/arm64/nvidia/tegra210/
H A Dtegra210_xusbpadctl.c232 #define UPHY_PLL_P0_CTL2_PLL0_CAL_EN (1 << 0) macro
630 reg |= UPHY_PLL_P0_CTL2_PLL0_CAL_EN; in uphy_pex_enable()
646 reg &= ~UPHY_PLL_P0_CTL2_PLL0_CAL_EN; in uphy_pex_enable()