Searched refs:UPHY_PLL_P0_CTL1_PLL0_PWR_OVRD (Results 1 – 1 of 1) sorted by relevance
222 #define UPHY_PLL_P0_CTL1_PLL0_PWR_OVRD (1 << 4) macro584 reg |= UPHY_PLL_P0_CTL1_PLL0_PWR_OVRD; in uphy_pex_enable()723 reg &= ~UPHY_PLL_P0_CTL1_PLL0_PWR_OVRD; in uphy_pex_enable()