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Searched refs:UL (Results 1 – 25 of 54) sorted by relevance

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/f-stack/freebsd/arm64/include/
H A Darmreg.h67 #define UL(x) UINT64_C(x) macro
92 #define CTR_TminLine_MASK (UL(0x3f) << CTR_TminLine_SHIFT)
349 #define ID_AA64ISAR0_DP_MASK (UL(0xf) << ID_AA64ISAR0_DP_SHIFT)
359 #define ID_AA64ISAR0_TS_MASK (UL(0xf) << ID_AA64ISAR0_TS_SHIFT)
630 #define ID_AA64PFR0_EL0_64 (UL(0x1) << ID_AA64PFR0_EL0_SHIFT)
635 #define ID_AA64PFR0_EL1_64 (UL(0x1) << ID_AA64PFR0_EL1_SHIFT)
641 #define ID_AA64PFR0_EL2_64 (UL(0x1) << ID_AA64PFR0_EL2_SHIFT)
650 #define ID_AA64PFR0_FP_MASK (UL(0xf) << ID_AA64PFR0_FP_SHIFT)
653 #define ID_AA64PFR0_FP_HP (UL(0x1) << ID_AA64PFR0_FP_SHIFT)
712 #define ID_AA64PFR1_BT_MASK (UL(0xf) << ID_AA64PFR1_BT_SHIFT)
[all …]
H A Dprofile.h67 (uintfptr_t)btrap) : ~0UL)
H A D_stdint.h46 #define UINT64_C(c) (c ## UL)
H A Dpte.h57 #define ATTR_S2_XN_NONE 0UL /* Allow execution at EL0 & EL1 */
/f-stack/dpdk/drivers/raw/ifpga/base/
H A Difpga_fme_error.c105 writeq(0UL, &fme_err->pcie0_err_mask); in fme_err_set_pcie0_errors()
142 writeq(0UL, &fme_err->pcie1_err_mask); in fme_err_set_pcie1_errors()
217 writeq(0UL, &fme_err->pcie0_err_mask); in fme_error_enable()
218 writeq(0UL, &fme_err->pcie1_err_mask); in fme_error_enable()
219 writeq(0UL, &fme_err->ras_nonfat_mask); in fme_error_enable()
220 writeq(0UL, &fme_err->ras_catfat_mask); in fme_error_enable()
H A Dopae_osdep.h45 #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
/f-stack/app/redis-5.0.5/deps/jemalloc/m4/
H A Dax_cxx_compile_stdcxx.m4291 return strlen_c_r(s, 0UL);
294 static_assert(strlen_c("") == 0UL, "");
295 static_assert(strlen_c("1") == 1UL, "");
296 static_assert(strlen_c("example") == 7UL, "");
297 static_assert(strlen_c("another\0example") == 7UL, "");
469 return (sizeof(x) == 1UL) ? 1 : 0;
494 auto length = 0UL;
500 static_assert(strlen_c("") == 0UL, "");
501 static_assert(strlen_c("x") == 1UL, "");
502 static_assert(strlen_c("test") == 4UL, "");
[all …]
/f-stack/freebsd/contrib/openzfs/config/
H A Dkernel-declare-event-class.m413 trace_zfs_autoconf_event_one(1UL);
14 trace_zfs_autoconf_event_two(2UL);
/f-stack/freebsd/arm/ti/usb/
H A Domap_host.c61 #define UHH_SYSCONFIG_MIDLEMODE_FORCESTANDBY (0UL << 12)
66 #define UHH_SYSCONFIG_SIDLEMODE_FORCEIDLE (0UL << 3)
89 #define UHH_HOSTCONFIG_P1_MODE_ULPI_PHY (0UL << 16)
93 #define UHH_HOSTCONFIG_P2_MODE_ULPI_PHY (0UL << 18)
H A Domap_tll.c101 #define TLL_SYSCONFIG_SIDLE_FORCED_IDLE (0UL << 3)
118 #define TLL_SHARED_CONF_USB_DIVRATIO_1 (0UL << 2)
/f-stack/freebsd/mips/include/
H A D_stdint.h58 #define UINT64_C(c) (c ## UL)
74 #define __UINT64_C(c) (c ## UL)
/f-stack/dpdk/drivers/common/octeontx2/
H A Dotx2_common.h46 (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
/f-stack/dpdk/drivers/bus/fslmc/mc/
H A Dfsl_mc_cmd.h34 (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
/f-stack/dpdk/drivers/crypto/ccp/
H A Dccp_dev.c154 if (addr[i] == 0UL) in ccp_find_first_zero_bit()
156 if (addr[i] < ~(0UL)) in ccp_find_first_zero_bit()
174 mask_to_set = ~0UL; in ccp_bitmap_set()
195 mask_to_clear = ~0UL; in ccp_bitmap_clear()
238 return _ccp_find_next_bit(addr, size, offset, 0UL); in ccp_find_next_bit()
246 return _ccp_find_next_bit(addr, size, offset, ~0UL); in ccp_find_next_zero_bit()
H A Dccp_dev.h142 (~0UL << ((start) & (BITS_PER_WORD - 1)))
144 (~0UL >> (-(nbits) & (BITS_PER_WORD - 1)))
/f-stack/dpdk/app/test-crypto-perf/
H A Dcperf_test_latency.c175 uint64_t tsc_max = 0, tsc_min = ~0UL, tsc_tot = 0, tsc_idx = 0; in cperf_latency_test_runner()
176 uint64_t enqd_max = 0, enqd_min = ~0UL, enqd_tot = 0; in cperf_latency_test_runner()
177 uint64_t deqd_max = 0, deqd_min = ~0UL, deqd_tot = 0; in cperf_latency_test_runner()
/f-stack/freebsd/arm/ti/
H A Dti_i2c.h84 #define I2C_CON_OPMODE_STD (0UL << 12)
/f-stack/dpdk/doc/guides/bbdevs/
H A Dfpga_5gnr_fec.rst17 - LDPC Decode in the UL
19 - Maximum of 32 UL queues per VF
180 allocates different bandwidth to UL and DL. The weight is configured by this
182 cbps (code block per second) ratio between UL and DL is 12:1, then the
192 streamed in from UL/DL code block FIFO.
H A Dfpga_lte_fec.rst17 - Turbo Decode in the UL with total throughput of 1.5 Gbits/s assuming 8 decoder iterations
19 - Maximum of 32 UL queues per VF
179 allocates different bandwidth to UL and DL. The weight is configured by this
181 cbps (code block per second) ratio between UL and DL is 12:1, then the
191 streamed in from UL/DL code block FIFO.
/f-stack/freebsd/amd64/include/
H A Dprofile.h103 (uintfptr_t)btrap) : ~0UL)
/f-stack/freebsd/x86/include/
H A D_stdint.h59 #define UINT64_C(c) (c ## UL)
/f-stack/freebsd/kern/
H A Dkern_ubsan.c1521 ulongest UL = 0; local
1532 memcpy(&UL, REINTERPRET_CAST(ulongest *, ulNumber), sizeof(ulongest));
1540 UL = *REINTERPRET_CAST(uint64_t *, ulNumber);
1549 UL = ulNumber;
1553 return UL;
1608 ulongest UL = llluGetNumber(szLocation, pType, ulNumber); local
1609 DeserializeNumberUnsigned(pBuffer, zBUfferLength, pType, UL);
/f-stack/freebsd/sys/
H A Dbitset.h232 __mask = ~0UL << ((start) % _BITSET_BITS); \
242 __mask = ~0UL; \
/f-stack/freebsd/contrib/octeon-sdk/
H A Dcvmx-spinlock.h357 if (lock->value == ~0UL) in _int_cvmx_spinlock_rec_unlock()
/f-stack/freebsd/amd64/vmm/intel/
H A Dvmx_cpufunc.h171 #define INVVPID_TYPE_ADDRESS 0UL

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